EVAL-AD5161DBZ User Guide
UG-624
Rev. 0 | Page 5 of 16
Signal Amplifier
The RDAC can be operated as an inverting or noninverting
signal amplifier and can support linear or pseudologarithmic
gain. Table 6 shows the available configurations.
The noninverting amplifier with linear gain is shown in Figure 4,
and the gain is defined in Equation 3.
R38
R
G
WB
+
=
1
(3)
where
R
WB
is the resistance between the W and B terminals.
VOUT2
V
IN
RDAC
R42
C1
10nF
W2
B2
W
B
R41
1.7kΩ
R38
2.7kΩ
11876-
004
Figure 4. Noninverting Amplifier with Linear Gain
The noninverting amplifier with pseudologarithmic gain is
shown in Figure 5, and the gain is defined in Equation 4.
AW
WB
R
R
G
+
=
1
(4)
where:
R
WB
is the resistance between the W and B terminals.
R
AW
is the resistance between the A and W terminals.
VOUT2
V
IN
RDAC
R42
C1
10nF
W2
B2
A
B
W
R41
1.7kΩ
A2
R43
11876-
005
Figure 5. Noninverting Amplifier with Pseudologarithmic Gain
R43 and R42 can be used to set the maximum and minimum
gain limits.
The inverting amplifier with linear gain is shown in Figure 6,
and the gain is defined in Equation 5.
R38
R
G
WB
−
=
(5)
where
R
WB
is the resistor between the W and B terminals.
Note that the input signal, V
IN
, must be negative.
11876-
006
VOUT2
V
IN
RDAC
R42
C1
10nF
W2
B2
W
B
R41
1.7kΩ
R38
2.7kΩ
NOTES
1. THE INPUT SIGNAL, V
IN
, MUST BE NEGATIVE.
Figure 6. Inverting Amplifier with Linear Gain
Table 6. Amplifier Selection Link Settings
Link Settings
Amplifier
Gain
Daughter Board
Motherboard
V
IN
Range
Noninverting
Linear
P5: A2 position,
A7: LIN position,
0 V to V
DD
P6: W2 position,
A6: N-INV position,
P7: B2 position,
A8: N-INV position
P8: not inserted
Pseudologarithmic
P5: A2 position,
A7: LOG position,
0 V to V
DD
P6: W2 position,
A6: N-INV position,
P7: B2 position,
A8: N-INV position
P8: not inserted
Inverting
Linear
P5: A2 position,
A7: LIN position,
−V
DD
to 0 V
P6: W2 position,
A6: INV position,
P7: B2 position,
A8: INV position
P8: not inserted
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