Analog Devices dBCool ADT7476, Руководство пользователя

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ADT7476
Rev. B | Page 60 of 72
Table 30. Voltage Limit Registers
1
Register Address R/W Description
2
Power-On Default
0x44 R/W 2.5 V low limit 0x00
0x45 R/W 2.5 V high limit 0xFF
0x46 R/W V
CCP
low limit 0x00
0x47 R/W V
CCP
high limit 0xFF
0x48 R/W V
CC
low limit 0x00
0x49 R/W V
CC
high limit 0xFF
0x4A R/W 5 V low limit 0x00
0x4B R/W 5 V high limit 0xFF
0x4C R/W 12 V low limit 0x00
0x4D R/W 12 V high limit 0xFF
1 Setting the Configuration Register 1 LOCK bit has no effect on these registers.
2 High limits: An interrupt is generated when a value exceeds its high limit (>comparison). Low limits: An interrupt is generated when a value is equal to or below its low
limit (≤comparison).
Table 31. Temperature Limit Registers
1
Register Address R/W Description 2 Power-On Default
0x4E R/W Remote 1 temperature low limit 0x81
0x4F R/W Remote 1 temperature high limit 0x7F
0x50 R/W Local temperature low limit 0x81
0x51 R/W Local temperature high limit 0x7F
0x52 R/W Remote 2 temperature low limit 0x81
0x53 R/W Remote 2 temperature high limit 0x7F
1 Exceeding any of these temperature limits by 1°C causes the appropriate status bit to be set in the interrupt status register. Setting the Configuration Register 1 LOCK
bit has no effect on these registers.
2
High limits: An interrupt is generated when a value exceeds its high limit (>comparison). Low limits: An interrupt is generated when a value is equal to or below its low
limit (≤comparison).
Table 32. Fan Tachometer Limit Registers
1
Register Address R/W Description Power-On Default
0x54 R/W TACH1 minimum low byte 0xFF
0x55 R/W TACH1 minimum high byte/single-channel ADC channel select 0xFF
0x56 R/W TACH2 minimum low byte 0xFF
0x57 R/W TACH2 minimum high byte 0xFF
0x58 R/W TACH3 minimum low byte 0xFF
0x59 R/W TACH3 minimum high byte 0xFF
0x5A R/W TACH4 minimum low byte 0xFF
0x5B R/W TACH4 minimum high byte 0xFF
1 Exceeding any of the TACH limit registers by 1 indicates that the fan is running too slowly or has stalled. The appropriate status bit is set in Interrupt Status Register 2
to indicate the fan failure. Setting the Configuration Register 1 LOCK bit has no effect on these registers.
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