System Architecture
2-6
Blackfin A-V EZ-Extender Manual
MOSI
(Output)
The SPI serial output data signal used to program the
control register of the AD1836A audio codec.
MISO
(Output)
The SPI serial input data signal used to read the control
register of the AD1836A audio codec.
RSCLK0
(Bi)
The processor’s
SPORT0
receive clock signal connected to
the serial clock on the digital side of the audio codec’s
analog input. In I
2
S mode, the signal can connect to the
TSCLK0
net.
JP7.1/2
RFS0
(Bi)
The processor’s
SPORT0
receive frame sync signal con-
nected to the frame sync on the digital side of the audio
codec’s analog input. In I
2
S mode, the signal can connect
to the
TFS0
net.
JP7.1/2
DR0PRI
(Output)
A connection to the data output of the audio codec; can
be disconnected with a jumper if needed for another pur-
pose.
JP7.3/4
DR0SEC
(Output)
A secondary connection to the data output of the audio
codec. Can be disconnected with a jumper if needed for
another purpose.
JP7.5/6
TSCLK0
(Bi)
The processor’s
SPORT0
transmit clock signal, connects to
the serial clock on the digital side of the audio codec’s
analog output. In I
2
S mode, the signal can connect to the
RSCLK0
net.
JP7.1/2
TFS0
(Bi)
The processor’s
SPORT0
transmit frame sync signal. Con-
nects to the frame sync on the digital side of the audio
codec’s analog output. In I
2
S mode, the signal can con-
nect to the
RFS0
net.
JP7.1/2
DT0PRI
(Input)
A connection to the data input of the audio codec.
DT0SEC
(Input)
A secondary connection to the data input of the audio
codec.
Table 2-1. Signals of Expansion Interface Connectors (Cont’d)
Net/Bus Name
(Direction)
Blackfin A-V EZ-Extender Function
Relevant
Configuration
Jumpers
Содержание Blackfin A-V EZ-Extender
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