ADSP-21160 EZ-KIT Lite Evaluation System Manual
ix
PREFACE
Thank you for purchasing the ADSP-21160 EZ-KIT Lite
®
, Analog
Devices, Inc. evaluation system for SHARC
®
digital signal processors
(DSPs).
SHARC processors are based on a 32-bit super Harvard architecture that
includes a unique memory architecture comprised of two large on-chip,
dual-ported SRAM blocks coupled with a sophisticated IO processor,
which gives a SHARC processor the bandwidth for sustained high-speed
computations. SHARC processors represent today’s de facto standard for
floating-point processor targeted for premium audio applications.
The evaluation system is designed to be used in conjunction with the
Vi+
®
development environment to test the capabilities of
ADSP-21160 SHARC processors. The Vi+ development envi-
ronment gives you the ability to perform advanced application code
development and debug, such as:
• Create, compile, assemble, and link application programs written
in C++, C, and ADSP-21160 assembly
• Load, run, step, halt, and set breakpoints in application programs
• Read and write data and program memory
• Read and write core and peripheral registers
• Plot memory
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