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UG-439 

Evaluation Board User Guide

 

Rev. A | Page 4 of 13 

 

Figure 2. BUCK1 External Output Voltage Setting 

Setting the Output Voltage of the LDO Regulators 

Each LDO output voltage is set through external resistor 
dividers, as shown in Figure 3, for LDO1. The output voltage can 
optionally be factory programmed to default values as indicated in 
the 

ADP5034

 data sheet. In this event, FB3 must be connected to 

the top of the capacitor on VOUT3 by placing a 0 Ω resistor on 
R

TOP

, and leave R

BOT 

unpopulated. Refer to Table 2 for the 

corresponding 0 Ω resistor placements on R

TOP

 per channel. 

 

Figure 3. LDO1 External Output Voltage Setting 

External Resistor Divider Setting for Buck and LDO 
Regulators 

The 

ADP5034

 TSSOP evaluation boards are supplied with fixed 

resistor dividers with values chosen for a target output voltage. 
Varying the resistor values of the resistor divider networks 
varies the output voltage accordingly. 

Table 2. External Resistor Dividers  

Resistor Divider 

Buck 1 

Buck 2 

LDO1 

LDO2 

R

TOP

 

RT1 RT2 RT3 RT4 

R

BOT

 

RB1 RB2 RB3 RB4 

MEASURING EVALUATION BOARD PERFORMANCE 

Measuring Output Voltage Ripple of Buck Regulators 

To observe the output voltage ripple of Buck 1, place an oscillo-
scope probe across the output capacitor (COUT1) with the probe 
ground lead at the negative (−) capacitor terminal and the probe 
tip at the positive (+) capacitor terminal.  

Set the oscilloscope to ac, 10 mV/division, and 2 μs/division 
time base, with the bandwidth set to 20 MHz to prevent noise 
from interfering with the measurements. It is also recommended 
to shorten the ground loop of the oscilloscope probe to minimize 
coupling. One way of measuring the output voltage ripple is to 
solder a wire to the negative (−) capacitor terminal and wrap it 
around the barrel of the probe, while the tip directly connects to 
the positive (+) capacitor terminal, as shown on Figure 4. 

 

Figure 4. Measuring Output Voltage Ripple 

Measuring the Switching Waveform of Buck Regulators 

To observe the switching waveform with an oscilloscope, place 
the oscilloscope probe tip at the end of the inductor with the probe 
ground at GND. Set the oscilloscope to dc, 2 V/division, and 
200 ns/division time base. When the MODE pin is set to high, the 
buck regulators operate in forced PWM mode. When the MODE 
pin is set to low and the load is above a predefined threshold, the 
buck regulators operate in PWM mode. When the load current 
falls below a predefined threshold, the regulator operates in PSM, 
improving the light load efficiency. Typical PWM and PSM 
switching waveforms are shown in Figure 5 and Figure 6. 

 

Figure 5. Typical Waveforms, V

OUT2

 = 3.3 V, I

OUT2

 = 30 mA, PSM Mode 

 

Figure 6. Typical Waveforms, V

OUT2

 = 3.3 V, I

OUT2

 = 30 mA, PWM Mode  

BUCK

AGND

FB1

SW1

R1

R2

VOUT1

VOUT1

VIN1

L1

1µH

C5

10µF

V

OUT1

 = V

FB1

+ 1

R1
R2

10895-

002

LDO1

FB3

R

TOP

R

BOT

VOUT3

VOUT3

VIN3

C7

1µF

V

OUT1

 = V

FB3

+ 1

R1
R2

1089

5-

003

1

0895-

0

04

2

4

T

1

CH1

 50.0mV

M 4.00µs A CH2       240mA

T

  28.40%

CH2 500mA 

CH4 2.00V

I

SW

VOUT2

SW2

1

0895-

0

05

2

4

T

1

CH1

 50mV

M 400ns

A CH2       220mA

T

  28.40%

BW

CH2 500mA 

CH4 2.00V

 BW

I

SW

VOUT2

SW2

108

95-

006

Содержание ADP5034

Страница 1: ...ion to change buck regulators from power save mode PSM to pulse width modulation PWM operation GENERAL DESCRIPTION This user guide describes the hardware for the evaluation of the ADP5034 and includes...

Страница 2: ...Materials 13 Related Links 13 REVISION HISTORY 4 2017 Rev 0 to Rev A Changes to General Description Section and Figure 1 1 Changes to Enable Section Table 1 and Turning on the Evaluation Board Section...

Страница 3: ...For example connect the Buck 1 output VOUT1 and the negative load connection to PGND If an ammeter is used connect it in series with the load Connect the positive ammeter terminal to the evaluation bo...

Страница 4: ...base with the bandwidth set to 20 MHz to prevent noise from interfering with the measurements It is also recommended to shorten the ground loop of the oscilloscope probe to minimize coupling One way...

Страница 5: ...xamining the change in the output voltage The buck regulator line regulation plots for VOUT2 3 3 V and VOUT2 1 8 V are shown in Figure 9 and Figure 10 respectively Figure 9 Buck Regulator Line Regulat...

Страница 6: ...and VIN maximum For example a fixed 3 3 V output needs VIN to be varied between 3 8 V and 5 5 V This measurement can be repeated under different load conditions Figure 13 shows the typical line regul...

Страница 7: ...t supply voltage may need to be adjusted to account for IR drops especially if large load currents are used Cascading an LDO Regulator from the Buck Regulator For certain applications such as analog c...

Страница 8: ...EN2 JEN3 and JEN4 are connected to ground disabling the other channels When measuring the voltages on VOUT2 VOUT3 and VOUT4 ensure that the respective channels are enabled and the volt meters are conn...

Страница 9: ...nt when supplying its largest load level 300 mA When the device is disabled the ground current drops to less than 1 A Figure 17 shows the evaluation board connected to a voltage source and an ammeter...

Страница 10: ...T1 RB1 RB3 RT3 RT4 RB4 1 2 1 JV3V1 CIN2A 2 1 JVIN4 2 1 JVIN3 3 2 1 JEN1 3 2 1 JMODE 1 VOUT2 1 1 VOUT1S 1 VOUT1 1 GND1 1 GND 1 VOUT3 1 VOUT3S 1 VOUT4S 1 3 14 15 2 7 8 21 20 PAD 25 18 11 10 19 13 16 5 2...

Страница 11: ...Evaluation Board User Guide UG 439 Rev A Page 11 of 13 Figure 19 Evaluation Board of the ADP5034 TSSOP Figure 20 Top Layer Recommended Layout for ADP5034 TSSOP 10895 016 10895 017...

Страница 12: ...UG 439 Evaluation Board User Guide Rev A Page 12 of 13 Figure 21 Bottom Layer Recommended Layout for ADP5034 TSSOP 10895 018...

Страница 13: ...Board and ii permit any Third Party to access the Evaluation Board As used herein the term Third Party includes any entity other than ADI Customer their employees affiliates and in house consultants T...

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