Analog Devices ADP2442-EVALZ, Руководство пользователя

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Evaluation Board User Guide UG-456
Rev. 0 | Page 7 of 12
Figure 10. Load Transient, V
IN
= 24 V, V
OUT
= 5 V, 500 mA Step
Figure 11. Load Transient, V
IN
= 12 V, V
OUT
= 5 V, 500 mA
Figure 12. Startup, V
IN
= 24 V, V
OUT
= 5 V, Load 5 Ω, PWM Mode
Figure 13. Shutdown, V
IN
= 24 V, V
OUT
= 5 V, Load 5 Ω
Figure 14. Clock Synchronization, V
IN
= 24 V, V
OUT
= 5 V
Figure 15. Bode Plot, V
IN
= 24 V, V
OUT
= 5 V, f
SW
= 500 kHz, Load = 1 A,
f
CO
= 37 kHz, Phase Margin = 55
CH1 100mV CH2 10V M200µs A CH4 720mA
1
4
2
T 71.2%
B
W
CH4 500mA
Ω
LOAD STEP 500mA
SW SW
10949-
0
1
1
V
OUT
CH1 100mV
CH4 500mA
M200µs A CH4 800mA
1
4
2
T 71.4%
B
W
CH2 5V
Ω
V
OUT
LOAD STEP 500mA
SW
10949-
012
CH2 10V
CH3 5V
M1ms A CH1 1.32V
1
3
2
T 23.2%
B
W
B
W
CH1 2V
10949-
013
ENABLE, CHANNEL 1 VOUT, AND CHANNEL 2 SW
SW SW
ENABLE
V
OUT
CH2 10V
CH3 5V
M1ms A CH1 1.52V
1
3
2
T 52.4%
B
W
B
W
CH1 2V
10949-
014
SW SW
ENABLE
V
OUT
CH2 10V
CH3 2V
M1µs A CH3 2.8V
1
3
2
T 50.4%
B
W
B
W
CH1 50mV
10949-
015
SW
SYNC
V
OUT
200
–200
160
–160
120
–120
80
–80
40
–40
0
110
1k 10k 100k
–90
90
–70
70
–50
50
–30
30
–10
10
P
HAS
E
(
Deg
rees)
M
AG
NI
T
UDE
(
d
B)
FREQUENCY (Hz)
10949-
016