AN-695
Application Note
Rev. C | Page 6 of 12
For example, to set I
TCMAX
and I
THMAX
equal to 2 A and 1.5 A,
respectively, use the following equations:
V
25
.
2
02
.
0
2
25
2
5
.
2
=
×
×
+
=
ILIMC
V
V
5
.
0
02
.
0
5
.
1
25
2
5
.
2
=
×
×
−
=
ILIMH
V
Turn Potentiometer W3 while measuring the voltage at Pin 1
(ILIMC); set this value to be equal to 2.25 V. Turn W4 while
measuring the voltage at Pin 32 (ILIMH); set this value to
equal 0.5 V.
SET THE OUTPUT VOLTAGE LIMIT
To protect the TEC from being overdriven, adjust W2 to set up the
V
LIM
voltage. The maximum voltage applied across the TEC can be
limited by setting the voltage on Pin 31 (VLIM). This voltage is
V
VLIM
=
V
TMAX
/5
where:
V
VLIM
is the voltage set at the VLIM pin.
V
TMAX
is the maximum voltage across the TEC.
For example, to set a maximum TEC voltage equal to 4 V, use
the following equation:
V
VLIM
= 4/5 = 0.8 V
MONITOR THE TEC VOLTAGE
The voltage across the TEC, V
TEC
, is monitored in real time by
measuring the voltage V
VTEC
from Pin 30 (VTEC).
V
TEC
=
V
LFB
–
V
SFB
= (
V
VTEC
– 0.5 ×
V
REF
)
×
4
where:
V
TEC
is the voltage across the TEC.
V
LFB
is the voltage measured at the LFB pin.
V
SFB
is the voltage measured at the SFB pin.
V
VTEC
is the voltage measured at the VTEC pin.
V
REF
is the reference voltage. When taken from the
V
REF
= 2.5 V.
Alternatively, measuring the voltage difference between the LFB
and SFB pins also results in the voltage across the TEC (V
TEC
).
Typically, the LFB pin connects to the positive terminal of the TEC,
and the SFB pin connects to the negative terminal of the TEC. The
definition of the TEC voltage is the voltage difference between
the TEC positive and negative terminals.
V
TEC
can be positive or negative. When V
TEC
is positive, the
TEC is in cooling mode. When V
TEC
is negative, the TEC is in
heating mode.
When the ADN8831 is set to standby mode, knowing the voltage
across the TEC is useful. This voltage, called the Seebeck voltage, is
generated by the temperature difference between the two TEC
plates. This measurement is useful for determining the condi-
tion of the TEC and/or the TEC working status for high end
systems.
MONITOR THE TEC CURRENT
The TEC current is monitored in real time by measuring the
voltage, V
ITEC
, on the ITEC pin (Pin 29). To calculate the TEC
current from the ITEC pin voltage, use the following equation:
S
REF
ITEC
TEC
R
V
V
I
×
×
−
=
25
5
.
0
where:
I
TEC
is the TEC current; defined as the current flowing in
through the TEC positive terminal (TECP) and out the
TEC negative terminal (TECN).
R
S
is the current sense resistor value, set to 0.02 Ω on the
evaluation board.
TEMPERATURE COMPENSATION
Temperature stability and settling time are control loop gain
and bandwidth dependent. This includes the gain of the
ADN8831 and the TEC/thermistor feedback. To achieve
the highest dc precision, the control loop uses a proportional
integral differential (PID) compensation network. Because
thermal loads can vary widely from TEC to TEC, a tunable
compensation network is available on the evaluation board.
To tune the PID compensation network, apply a low frequency
square wave to the LP2 solder pad and monitor the OUT2 test
point using an oscilloscope.
04592-
010
R1
R2
R
TH
R3
CD
RD
CI
TEMPOUT
TEMPSET
OUT2
V
REF
RP
V
REF
2
CF
RI
LP2
LP1
Figure 6. Tunable Compensation Network
Before doing this, connect a TEC to the evaluation board TECP
and TECN pads and connect the thermistor attached to the
TEC to the evaluation board RTH and AGND pads. The low
frequency square wave equates to sending a step function to
TEMPSET. An alternative method to the square wave is to use
a pair of tweezers to short-circuit the LP2 solder pad with the
AGND test point. Observe the waveform at OUT2 to determine if
the compensation network matches the thermal load. The ideal
response at OUT2 has the fastest possible rise time and settling
time with little or no overshoot. Use the following steps to tune
the network:
1.
Set CI to 1 μF, RI and RP to 249 kΩ, RD to 100 kΩ, and CD
to 470 nF. Make sure that the loop is stable. If not, increase
CI and decrease RP. This has the effect of increasing the time
constant of the loop, allowing it to become stable. The effect
of this increased time constant is a slower response time in
the compensation network.
