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Application Note

AN-695

Rev. C | Page 11 of 12

04592-

007

Figure 12. Middle Layer 2 Layout

04592-

015

Figure 13. Bottom Layer Layout

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Содержание ADN8831

Страница 1: ...ADN8831 evaluation board offers a configurable design platform to work with various TECs and thermistors On the evaluation board the ADN8831 delivers and controls a bidirec tional TEC current using t...

Страница 2: ...ometers 3 Quick Start 4 Configure Setpoint Temperature Range 4 Configure the Setpoint Temperature 5 Set the Output Current Limits 5 Set the Output Voltage Limit 6 Monitor the TEC Voltage 6 Monitor the...

Страница 3: ...8831 is in shutdown mode when Switch S6 the right hand side knob is down When the knob is up default the ADN8831 is released from shutdown mode In shutdown mode the ADN8831 is powered off Switches S1...

Страница 4: ...t This is based on required TEC thermal control resolution and the target controllable temperature range These resistor values correspond to the high middle and low setpoint temperatures THIGH TMID an...

Страница 5: ...ge of 35 C to 15 C use 14 5 C 2 lower than the 15 C limit as the lower limit CONFIGURE THE SETPOINT TEMPERATURE The VTEMPSET voltage corresponds to a TEC setpoint temperature Configure the VTEMPSET us...

Страница 6: ...ondi tion of the TEC and or the TEC working status for high end systems MONITOR THE TEC CURRENT The TEC current is monitored in real time by measuring the voltage VITEC on the ITEC pin Pin 29 To calcu...

Страница 7: ...etwork see the ADN8831 data sheet ADJUST THE PWM SWITCHING FREQUENCY The ADN8831 evaluation board is default set to a free run PWM clock at 1 MHz To modify RFREQ adjust the PWM switching frequency see...

Страница 8: ...mistor This ensures that any interference coupled on the thermistor traces can cancel each other The low frequency temperature control circuit can be degraded easily by high frequency interference due...

Страница 9: ...ORK Figure 9 shows the schematic of the ADN8831 evaluation board Version 4 0 Note that THPAD shown as Pin 33 in this schematic refers to the exposed thermal pad underneath the chip set Connect THPAD t...

Страница 10: ...AN 695 Application Note Rev C Page 10 of 12 04592 005 Figure 10 Top Layer Silkscreen 04592 006 Figure 11 Middle Layer 1 Layout...

Страница 11: ...Application Note AN 695 Rev C Page 11 of 12 04592 007 Figure 12 Middle Layer 2 Layout 04592 015 Figure 13 Bottom Layer Layout...

Страница 12: ...Resistor 20 m 0805 Vishay WSL0805R0200FEA18 1 RD2 Resistor 24 9 k 0603 SUSUMU RR0816P 2492 D 39C 1 CI1 Capacitor ceramic 47 nF 0603 X7R 16 V Panasonic ECJ 1VB1C473K 1 RD3 Resistor 49 9 k 0603 Panason...

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