Analog Devices ADMV8818-EVALZ, Руководство пользователя

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ADMV8818-EVALZ Evaluation Board User Guide UG-1921
Rev. 0 | Page 7 of 18
Label Function
B Use the Logic Pins section to toggle the SDP-S logic pins, which are connected to the logic pins on the ADMV8818 chip. This section
includes the following:
RSTB : clear the check box to bring the ADMV8818 RST pin low, which holds the chip in reset. Select the check box again to
bring the chip out of reset.
SFL : select the check box to bring the ADMV8818 SFL pin high, which places the chip in SFL mode. This action also toggles the
on board ADG749BKSZ switch connected to the ADMV8818 CS pin (see Figure 10). While in SFL mode, the ADMV8818 CS pin is
connected to the SDP-S logic pin, CSB_AUX, and normal SPI transactions are disallowed.
CSB_AUX
: this pin is only available in SFL mode. Selecting the check box brings the SDP-S logic pin, CSB_AUX, high, which
advances the internal state machine pointer to the next lookup table. If an external waveform generator is connected to the
CSB_EXT port on the ADMV8818-EVALZ, the CSB_AUX pin has no effect and the CSB_EXT port takes precedence.
C Use the SFL Settings section to configure the SPI fast latch settings on the chip when in the SFL mode. Refer to the ADMV8818
data sheet for more information regarding the internal state machine and SFL mode functionality. This section includes the
following:
FAST_LATCH_STATE : this value is the next state of the internal state machine pointer (read only).
FAST_LATCH_LOAD : set this bit to load the pointer into the internal state machine.
FAST_LATCH_POINTER : use this value to adjust the pointer location of the internal state machine.
FAST_LATCH_START : this bit determines the start location within the internal state machine.
FAST_LATCH_STOP : this bit determines the stop location within the internal state machine.
FAST_LATCH_DIRECTION : this bit determines the direction that the internal state machine advances for each rising edge of
the CS pin when in SFL mode.
D The displayed block diagram section shows the actively selected WR or LUT number. This section includes the following:
Displaying States in… : the title updates to show the actively selected WR or LUT number.
Displayed States (or
Bypass
): depending on which filter band number is selected, the filter state value or
Bypass
populates into
the appropriate block.
Input Switch : this section displays the configuration of the input switch. When displaying a WR number, the input switch position
updates based on the SW_IN_SET_WRx bit fields, where x is a number from 0 to 4. If multiple bit fields are set, the priority is
WR0 to WR4. If no bit fields are set, the Input Switch position shows WR ? . When displaying an LUT number, the Input Switch
position reflects the SW_IN_SET_y bit fields, where y is a number from 0 to 127, depending on the LUT number selected.
Output Switch : this section displays the configuration of the output switch. When displaying a WR number, the output switch
position updates based on the SW_OUT_SET_WRx bit fields, where x is a number from 0 to 4. If multiple bit fields are set, the priority
is WR0 to WR4. If no bit fields are set, the Output Switch position shows WR ? . When displaying an LUT number, the Output Switch
position reflects the SW_OUT_SET_y bit fields, where y is a number from 0 to 127, depending on the LUT number selected.
E The Status section includes the following:
Mode : when the SFL pin is low, the mode is SPI Write . When the SFL pin is high, the mode is SPI Fast Latch and the chip uses
the LUT.
CSB_AUX Count : when in SFL mode, this field displays the number of times the CSB_AUX pin has been toggled.
Message
: upon entering SFL mode, the
Message
field displays
Waiting for CSB
. Once the CSB_AUX pin has been toggled, the
Message field displays the current LUT number followed by the next LUT number.
F The Display section determines the actively selected WR or LUT number. This section includes the following:
Mode : use the dropdown menu to select either WR or LUT display mode.
WR : when the Mode is set to WR , scroll up and down to set the WR number (0 to 4) that is currently being configured and
displayed on the diagram. Changing the WR number automatically changes the Mode to WR .
LUT : when the Mode is set to LUT , scroll up and down to set the LUT number (0 to 127) that is currently being configured and
displayed on the diagram. Changing to the LUT number automatically changes the Mode to LUT .
G The Filter Settings section shows the filter states, filter band selection, and switch set for the actively selected WR or LUT
number. This section includes the following:
State : scroll up and down to set the desired filter state value (0 to 15). Changing the HPF state updates the HPF_WRx or HPF_y
bit fields, and changing the LPF state updates the LPF_WRx or LPF_y bit fields, where x is the selected WR number, and y is the
selected LUT number.
Filter : scroll up and down to set the desired filter band value (0 to 4). A value of 0 corresponds to the bypass configuration, and
all other values correspond to the filter band number. Changing the HPF band updates the
SW_IN_WRx
or
SW_IN_y
bit fields.
Changing the LPF band updates the SW_OUT_WRx or SW_OUT_y bit fields.
Switch Set : these check boxes determine if the input and output switches change. Toggling the Switch Set for HPF sets the
SW_IN_SET_WRx or SW_IN_SET_y bit fields. Toggling the Switch Set for LPF sets the SW_OUT_SET_WRx or SW_OUT_SET_y
bit fields.