UG-284
Evaluation Board User Guide
Rev. 0 | Page 10 of 24
CLOCK AND CONTROL PORT
09
899
-00
6
I
2
C/SPI
SELECTION
I
2
C ADDRESS
SELECTION
EXTERNAL I
2
C
ADAPTER
CONNECTOR
EXTERNAL
CLOCK
IMPUT
MCLK2
SELECTION
JUMPER
MCLK1
SELECTION
JUMPER
RESET
Figure 10. Clock and Control Port
There are two master clock input pins for the
ADAU1373
:
MCLK1 and MCLK2. For each master clock, there are three
clock sources that can be selected by Jumper 21 and Jumper 22.
09
89
9-
02
3
1
2
OSC SMA1
POSITION A
PSIA
1
2
OSC SMA1
POSITION B
PSIA
1
2
OSC SMA1
POSITION C
PSIA
Figure 11. Configuration for Jumpers 21 and 22
J21 is for MCLK1 selection. The position definitions are shown
Figure 11 and Table 19.
Table 19. J21
Jumper
Position Function
A
Use an on-board 12.288 MHz oscillator as MCLK1.
B
Use an external SMA clock input as MCLK1.
C
Use an audio precision PSIA MCLK input connected
to J28 as MCLK1.
J22 is for MCLK2 selection. The position definitions are shown
in Figure 11 and Table 20.
Table 20. J22
Jumper
Position Function
A
Use an on-board 12.288 MHz oscillator as MCLK2.
B
Use an external SMA clock input as MCLK2.
C
Use an audio precision PSIA MCLK input connected
to J29 as MCLK2.
J23 is for the external I
2
C/SPI controller (USBi board) connec-
tion. J24 selects the control port mode of the ADAU1373. The
position definitions of this jumper are shown in Table 21.
Table 21. J24
Jumper Position
Function
On I
2
C mode
Off SPI
mode
J25 selects the I
2
C device address of the ADAU1373. The
position definitions of this jumper are shown in Table 22.
Table 22. J25
Jumper Position
Function
On I
2
C devices address = 0x1C.
Off I
2
C devices address = 0x1A.
