Quick Start Guide
AD9789-EBZ
Rev. A | Page 2 of 8
GETTING STARTED
Three different setups are explained here, each utilizing different sections of the AD9789 and the AD9789-EBZ Evaluation Board. All
three assume a high frequency, low-jitter input clock. To use a low frequency clock, see the section entitled
Using the AD9516 as the Clock
Source.
Internal Single-Tone Test
This setup configures the AD9789 to generate a sine wave internally by using the on-chip NCO. This allows the user to measure the
single-tone AC performance at the DAC output without needing an external data source. In this example, the data inputs are held
constant, only channel 0 is enabled and its NCO center frequency is set to 120MHz (Fdac=2GHz). This will modulate the DC static value
on the port up to the NCO frequency resulting in a single-tone at the DAC output centered at 120MHz.
Install the software as described in the
Software
section, and connect all the required cables as described in the
Hardware Setup
section.
Turn on the power supply. The current should be approximately 200mA. For this setup, the clock source should be set to generate a
2.0GHz tone at 2dBm. Jumpers JP9 and JP10 should be set to their CMOS position (away from the DPG2 connector).
Open the AD9789 SPI application from your Start Menu (Start > Programs > Analog Devices > AD9789-EBZ > AD9789 SPI). In the
lower left, click the Load button (it will stay depressed). Press the Run ( ) button in the upper left. A dialog will appear asking for the file
to load. Open
AD9789_SPIsettings_Int_Sine_Wave.txt
, located in the same directory as the SPI controller. After the run has completed,
click the Load button again to disable it. Click the PARMNEW control in the Reference/Sample/Sync Clock Control block and click the
run button to enable the digital clocks. After the run completes, disable the PARMNEW button and run the SPI controller again.
Also, ensure that the FREQNEW control bit is set. This bit needs to be set for any changes made to the center frequency of the BPF and
the rate converter (P/Q) to take effect. If the FREQNEW is set properly, the read back indicators for the rate converter and BPF will be
updated to the correct values upon the second run of the SPI program. Note that FREQNEW is a self-clearing bit and can therefore
always be set high.
Expected DAC Performance
For the setup described in the previous sections, the expected DAC output spectral performance is illustrated in Figure 3.
DAC Settings: f
DAC
=2GHz, static CMOS data, f
C0
=120MHz, f
BPF
=120MHz, Ch. 1, 2 and 3 are disabled.
Figure 3 - AD9789 Output Spectrum, Fout = 120MHz, Fdac = 2000MHz
