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UG-077 

Evaluation Board User Guide

 

Rev. 0 | Page 6 of 16 

6.

 

Program the R (reference) divider by clicking the 

R DIVIDER

 

box at the top of the main window. Set the desired value 
(72, in this case) and click 

OK

 (see Figure 13). 

7.

 

Program the N (feedback) divider by clicking the 

DIVIDER

 box at the top of the main window. Set the 

desired value and click 

OK

. For this example, N = 5500  

can use 8/9 dual modulus mode with A = 4 and B = 687.  

8.

 

Set the charge pump current (1.2 mA in this case) by 
clicking the 

CHARGE PUMP

 box in the upper right 

corner of the main window, and then click 

OK

9.

 

Note that if the desired configuration has the phase 
detector frequency above 50 MHz, an antibacklash pulse 
width of 1.3 ns may work better. This setting is accessed by 
clicking the 

PFD

 box to the left of the 

CHARGE PUMP

 

box. However, this setting normally does not need to be 
modified. 

10.

 

Set the VCO divider by clicking the green 

VCO

 box in the 

center of the main window, immediately to the left of the 

Cal VCO

 button. 

11.

 

Power down unused drivers by clicking the numbered 
triangular symbol on the right side of the main window 
(see Figure 7), and then clicking 

Power Down (Off)

 in the 

output driver window (see Figure 21

)

. Unused drivers that 

are not powered down can be a source of unwanted noise 
in the output signals. 

08

74

7-

0

07

 

Figure 7. Driver Symbol 

12.

 

Set the channel dividers by clicking 

DIVIDER 0

 through 

DIVIDER 3

, and entering the divider ratio. 

13.

 

Click the flashing red 

WRITE

 button under the 

REGISTER 

W/R

 control section. This loads the desired settings to the 

AD9522 evaluation board.  

14.

 

Click the blinking yellow 

Cal VCO

 button to load the VCO 

calibration window. The default VCO divide ratio (16) 
works for all applications. Click the 

Cal VCO

 button in the 

Calibrate VCO

 window to begin calibration (see Figure 19)

The PLL should now be locked and the 

LD

 (lock detect) 

LED on the left side of the board should be on.

 

Содержание AD9522 Series

Страница 1: ...ttenuation Clock distribution GENERAL DESCRIPTION The AD9522 x hereafter referred to as AD9522 is a very low noise PLL clock synthesizer featuring an integrated VCO clock dividers and up to 24 outputs...

Страница 2: ...nfiguration Window Config PLL 8 REFMON STATUS and LD Buttons 9 Register W R Box 9 SYNC PD Power Down and RESET Buttons 9 EEPROM Control Window 9 Reference R Divider Window 9 Feedback N Divider Window...

Страница 3: ...ct that signal to the J13 SMA connector DC coupling is recommended in applications requiring automatic hitless reference switching There is a possibility that the AD9522 receive buffer can chatter whe...

Страница 4: ...w indicating that the evaluation board was found or red text appears indicating that the evaluation board was not found 2 If the evaluation board is found click anywhere in the pop up window with the...

Страница 5: ...MODE box found at the top of the main window see Figure 8 2 Enter the intended reference input frequency in megahertz in the REF 1 MHz box at the upper left corner of the main window 3 Click the tria...

Страница 6: ...modified 10 Set the VCO divider by clicking the green VCO box in the center of the main window immediately to the left of the Cal VCO button 11 Power down unused drivers by clicking the numbered tria...

Страница 7: ...Evaluation Board User Guide UG 077 Rev 0 Page 7 of 16 EVALUATION SOFTWARE COMPONENTS MAIN WINDOW 08747 008 Figure 8 AD9522 Evaluation Software Main Window...

Страница 8: ...Single Ended Mode check box Note that this mode should not be used simultaneously with Enable REF 1 or Enable REF 2 If Disable Switchover De Glitch is activated the AD9522 maintains the phase relation...

Страница 9: ...issue an I O update command whenever registers are written to the AD9522 SYNC PD POWER DOWN AND RESET BUTTONS The SYNC PD and RESET buttons allow you to control these pins on the AD9522 Each button ha...

Страница 10: ...r value For example it is not possible to use the internal VCO and a feedback divider of 30 However the R divider can be doubled which allows a feedback divider of 60 The feedback divider window has a...

Страница 11: ...ow shown in Figure 19 is accessed by clicking the Cal VCO button on the main window A valid reference input signal must be present to complete VCO calibration and the VCO must be recalibrated any time...

Страница 12: ...nation require ments and OUT9 through OUT11 have been terminated differently from OUT0 through OUT8 OUT0 through OUT8 are ac coupled and this termination scheme is ideal for LVDS drivers However this...

Страница 13: ...a recently connected evaluation board 08747 022 Figure 25 USB Device Selection Window Configure Serial Port The I O Interface window allows you to control how the USB controller interacts with the AD9...

Страница 14: ...hoice Typical phase detector frequencies for these applications are 10 MHz to 100 MHz and typical loop bandwidths for this loop filter are 50 kHz to 500 kHz depending on the configuration The user sho...

Страница 15: ...Configuration A dialog box appears and acknowledges the I2 C mode and address The evaluation software starts at I2 C Address 0x058 and stops at the first valid I2 C address that it finds If the targe...

Страница 16: ...set in the register setup stp file because the user normally initiates VCO calibration manually while running the evaluation software To avoid a checksum mismatch it is recommended that the user manu...

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