AD9510/PCB
Rev. 0 | Page 6 of 28
CLOCK OUTPUTS
There are eight clock outputs on the AD9510. Four are
LVPECL and four are LVDS/CMOS. Each output has a
variety of possibilities for output termination.
Output Termination Options
LVPECL Clock Outputs
Each LVPECL output has several output termination options
(see Table 5). There are pads for ac coupling capacitors, which
can be shorted with 0 Ω resistors if necessary. Additionally,
there are two trace-to-GND resistor pads, one before and one
after the ac coupling cap. Finally, there is a trace-to-VDD
resistor pad. These pads can be used in any combination to
provide a wide range of termination possibilities.
LVDS/CMOS Clock Outputs
Each LVDS output has several output termination options.
First and foremost, a trace-to-trace resistor is used to control
the differential impedance termination. Another trace-to-trace
pad can be used for an additional resistor or a trace-to-trace
capacitive load. Finally, there are two capacitors to GND that
can be used for capacitive loading, or with resistors as resistor-
to-ground terminations.
Default Configuration
LVPECL Default Configuration
The default output termination for the LVPECL outputs is
50 Ω to VDD − 2 V. This is accomplished by connecting each
output trace, both the true and the complementary, to VDD
through a 127 Ω resistor and to GND through an 83 Ω resistor.
Additionally, the trace is not ac-coupled, so that there is a 0 Ω
resistor in series with each trace where the ac-coupled capacitor
would be located.
LVDS/CMOS Default Configuration
The default output termination for the LVDS outputs is a
100 Ω resistor between the two traces. This provides the
100 Ω differential impedance for the LVDS signal. None of
the capacitive loading pads is populated.
Changing the Configuration
Changing the termination configuration is as simple as
removing or adding resistors and capacitors. Because there are
so many different options for termination configurations, refer
to Table 5 and Table 6, as well as the Schematic section and text
found on the evaluation board to help determine the
appropriate termination scheme.
Table 5. LVPECL Output Termination Components
Output Channel
Pre-AC Coupling
Resistor to GND
AC Coupling Capacitor
Post-AC Coupling
Resistor to GND
Post-AC Coupling
Resistor to VDD
OUT0 R4
C4
R82
R81
OUT0B R7
C3
R80
R32
OUT1 R13
C5
R19
R16
OUT1B R12
C6
R14
R15
OUT2 R61
C1
R57
R58
OUT2B R1
C2
R60
R59
OUT3 R23
C7
R27
R26
OUT3B R20
C8
R25
R24
Table 6. LVDS Output Termination Components
Output Channel
Termination Resistor
Loading Capacitor to GND
Loading Capacitor to Other Trace
OUT4 R56
C25
C27
OUT4B R56
C26
C27
OUT5 R36
C17
C22
OUT5B R36
C21
C22
OUT6 R28
C9
C12
OUT6B R28
C10
C12
OUT7 R46
C30
C32
OUT7B R46
C31
C32
