EVAL-AD5696RSDZ User Guide
UG-726
Rev. C | Page 7 of 13
Table 5. Test Point Descriptions
Test Point
Description
AGND
Analog ground.
DGND
Digital ground.
SCLK/A0
Address input. Sets the first LSB of the 7-bit slave address. This signal is named SCLK_A0 in Figure 7.
SDO/SDA
Serial data line. This pin is used in conjunction with the SCL line to clock data into or out of the 24-bit input shift
register. SDA is a bidirectional, open-drain data line pulled to the supply with an external pull-up resistor. This signal is
named SDO_SDA in Figure 7. If using an external microcontroller, a 2.2 kΩ pull-up resistor connected to V
LOGIC
is
required.
SYNCB/SCL
Serial clock line. This pin is used in conjunction with the SDA line to clock data into or out of the 24-bit input register.
This signal is named SYNCB_SCL in Figure 7. If an external microcontroller is used, a 2.2 kΩ pull-up resistor connected
to V
LOGIC
is required.
SDIN/A1
Address input. This pin sets the second LSB of the 7-bit slave address. This signal is named SDIN_A1 in Figure 7.
VOUTA to VOUTD
Analog output voltage from DAC A to DAC D, respectively. The output amplifier has rail-to-rail operation.
