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AMPAK Technology Inc.     

www.ampak.com.tw

               

Proprietary & Confidential Information 

 

Doc. NO:   

WIFI  SDIO:  Using  external  pull  up  resistors depends on  the  SDIO  supply  voltage.  For 

1.8V,  the  resistance  range  is  30KΩ~82KΩ.  For  3.3V,  its  range  from  21 
KΩ~41 KΩ on the four data lines and the CMD line as the following circuitry. 

SDIO_D3

SDIO_D2

SDIO_D1

C10
10uF

1

2

R6

R7

R10

SDIO_D0

J8

Golden Finger_9

SD3

1

SDCMD

2

GND

3

3.3V

4

SDCLK

5

GND

6

SD0

7

SD1

8

SD2

9

SDIO_CLK

R28

R29

SDIO_CMD

VIO_3V3

SDIO_3V3

 

Figure2. WiFi verification connection interface to Host SDIO 

 

Hardware Setup: 

  Refer  to  Figure2  SDIO  pin  definition  connects  the  J8  interface  of  AP6XXX 

evaluation board to Host SDIO control interface. 

  Using pull high resistors (R6, R7, R10, R28, R29) that resistance is 30Kohm for 

1.8V or 3.3V VDDIO pull up voltage. (Pull high resistors are un-necessary if at 

verification phase.) 

  Connects an external antenna at SMA connector on the evaluation board. 

  Note to the VDDIO voltage level should be the same with GPIO voltage level of 

Host CPU. (VDDIO 3.3V or 1.8V selection by jump J11) 

WiFi software setup: 

Please follow up software guideline of Ampak official released. 

 

 

 

 

3. Bluetooth function verification step 

 

Содержание AP6398XU

Страница 1: ...ak com tw Proprietary Confidential Information i Doc NO AMPAK AP6398XU Evaluation Kits User manual Version 1 0 Revision History Date Revision Content Revised By Version 2019 10 16 Modify figure1 Ali 1 0 Wi Fi and Bluetooth module ...

Страница 2: ...ns and reserved GPIO on Evaluation board which describes as below Figure1 Top view of AP6398XU EVB Interface highlights 1 U1 AP6398XU SIP module 2 J1 UART interface connects with UART transport board for BT measuring 3 J2 Enable H or disable L Bluetooth and WiFi function 4 J6 VBAT WL_VIO BT_VIO for main system I O power path 5 J7 5V DC mini USB input connector 6 J8 Standard SDIO interfaces for Wi ...

Страница 3: ...Figure2 WiFi verification connection interface to Host SDIO Hardware Setup Refer to Figure2 SDIO pin definition connects the J8 interface of AP6XXX evaluation board to Host SDIO control interface Using pull high resistors R6 R7 R10 R28 R29 that resistance is 30Kohm for 1 8V or 3 3V VDDIO pull up voltage Pull high resistors are un necessary if at verification phase Connects an external antenna at S...

Страница 4: ...r to Figure3 UART pin definition connects the J1 interface of AP6359S evaluation board to Host UART control interface Connects an external antenna at SMA connector on the evaluation board Note to the VDDIO voltage level should be the same as GPIO voltage level of Host CPU WiFi and Bluetooth software setup Please follow up software guideline of Ampak official released ...

Страница 5: ...ving antenna Increase the separation between the equipment and receiver Connect the equipment into an outlet on a circuit different from that to which the receiver is connected Consult the dealer or an experienced radio TV technician for help Changes or modifications not expressly approved by the party responsible for compliance could void the user s authority to operate the equipment This equipme...

Страница 6: ...usly are required to be evaluated using the multi transmitter procedures The host integrator must follow the integration instructions provided in this document and ensure that the composite system end product complies with the requirements by a technical assessment or evaluation to the rules and to KDB Publication 996369 The host integrator installing this module into their product must ensure tha...

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