AMD AX1800DMT3C - Athlon XP 1.53 GHz Processor, Техническое описание, Страница: 45 / 94

Chapter 7 Electrical Data 33
24309E—March 2002
AMD Athlon™ XP Processor Model 6 Data Sheet
Preliminary Information
Table 10 shows the SYSCLK/SYSCLK# differential clock AC
characteristics of the AMD Athlon XP processor model 6.
Figure 10 shows a sample waveform of the SYSCLK signal.
Figure 10. SYSCLK Waveform
Table 10. SYSCLK and SYSCLK# AC Characteristics
Symbol Parameter Description Minimum Maximum Units Notes
Clock Frequency 50 133 MHz
Duty Cycle 30% 70%
t
1
Period 7.5 ns 1, 2
t
2
High Time 1.05 ns
t
3
Low Time 1.05 ns
t
4
Fall Time 2 ns
t
5
Rise Time 2 ns
Period Stability
±
300 ps
Notes:
1. Circuitry driving the AMD Athlon™ system bus clock inputs must exhibit a suitably low closed-loop jitter bandwidth to allow the
PLL to track the jitter. The –20dB attenuation point, as measured into a 10
-
or 20
-
pF load must be less than 500 kHz.
2. Circuitry driving the AMD Athlon system bus clock inputs may purposely alter the AMD Athlon system bus clock frequency (spread
spectrum clock generators). In no cases can the AMD Athlon system bus period violate the minimum specification above.
AMD Athlon system bus clock inputs can vary from 100% of the specified frequency to 99% of the specified frequency at a
maximum rate of 100 kHz.
t
5
V
CROSS
t
2
t
3
t
4
t
1
V
Threshold-AC