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Enpirion

®

 Power Evaluation Board User Guide 

EN2360QI PowerSoC 

 

Power down the device. Move  ENA into disable position. Connect the clock signal as 
just indicated. The clock signal should be clean and have a frequency range specified in 
the datasheet, and an amplitude 0 to 2.5 volts with a duty cycle between 20 and 80%. 
With S_IN  signal disabled, power up the device and move ENA jumper to Enabled 
position. The device is now powered up and outputting  the desired voltage.  The device 
is switching at its free running frequency.  The switching waveform may be observed 
between  test points SW and GND.  Now enabling  the S_IN  signal will automatically 
phase lock the internal switching frequency to the externally  applied  frequency as long 
as the external  clock parameters are within the specified range. To observe phase-lock 
connect oscilloscope probes to the input clock as well as to the SW test point.  Phase 
lock range can be determined by sweeping the external  clock frequency up / down until 
the device just goes out of lock at the two extremes of its range. 
 
For spread spectrum operation the input clock frequency may be swept between two 
frequencies that are within the lock range. The sweep (jitter) repetition rate should be 
limited to 10 kHz. The radiated  EMI spectrum may be now measured in various states – 
free running, phase locked to a fixed frequency and spread spectrum.  
 
Before measuring radiated EMI,  place a 10uF/0805,  X7R capacitor at the input and 
output edges of the PCB (C8 and C9 positions), and connect the PVIN  power and the 
load to the board at or near these capacitors.

 

The added capacitor at the input edge is 

for high-frequency  decoupling  of the input cables. The one added at the output edge is 
meant to represent a typical load decoupling  capacitor. We recommend doing EMI 
testing in single-supply  mode only as this will simplify the test setup.

 

 

Page 5 of 10 

www.altera.com/enpirion

 

Содержание Enpirion EN2360QI

Страница 1: ...to set the output voltage to any value within the range 0 6V to 3 3V The evaluation board as shipped is populated with a 4 resistor divider option The upper resistor is fixed and has a phase lead cap...

Страница 2: ...to Enable to GND indicated as NR1 NR2 in the schematic As a result of these components there is no need for a jumper on J3 see Figure 1 and the component FB1 to the left of AVIN test point TP28 should...

Страница 3: ...lease see Figure 5 and the Bill of Materials section Figure 2 Output Voltage selection jumpersJ5 Nominal jumper position voltagesfrom left to right are 3 31V 1 8V 1 2V and 1 0V Jumper shown selects1 2...

Страница 4: ...tude to swing from 0 to 2 5 volts Set the pulse period to 10msec and duty cycle to 50 Hook up oscilloscope probes to ENA SS POK and VOUT with clean ground returns Apply power to evaluation board Enabl...

Страница 5: ...the input clock as well as to the SW test point Phase lock range can be determined by sweeping the external clock frequency up down until the device just goes out of lock at the two extremes of its r...

Страница 6: ...Enpirion Power Evaluation Board User Guide EN2360QI PowerSoC Figure 4 EvaluationBoard Top and Assembly Layers Page 6 of 10 www altera com enpirion...

Страница 7: ...EAIN VFB VFB TP5 R4 J9 Updated names for pins 53 60 and associated nets 6 27 2012 AG TP28 C16 R5 TP21 TP22 AVIN C17 EAIN VFB C19 R15 C12 R11 C13 C15 C21 R2 U1 EN2360 NC1 1 NC2 2 NC3 3 NC4 4 NC5 5 NC6...

Страница 8: ...p similar to the one shown below to measure switching signals and input output ripple to avoid noise coupling into the probe ground lead Input ripple output ripple and load transient deviation are bes...

Страница 9: ...c TSW 102 07 T S J3 1 CONNECTOR HEADER 3 POSITION Samtec TSW 103 07 T S J5 1 CONNECTOR HEADER 8 POSITION Dual Samtec TSW 104 24 T D J6 J7 J9 J11 5 BANANA JACK KEYSTONE 575 4 R1 1 RES 100K OHM 1 16W 1...

Страница 10: ...e property of their respective holdersasdescribed at www altera com common legal html Altera warrantsperformance of its semiconductor productsto current specificationsin accordance with Altera sstanda...

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