Altera Enpirion EN2360QI Скачать руководство пользователя страница 4

Enpirion

®

 Power Evaluation Board User Guide 

EN2360QI PowerSoC 

 

Alternatively,  you can control the ENA jumper with an external source. For dual supply 
mode, you can also tie Enable to AVIN  by removing NR1 from the back side, putting a 
short across the FB1 footprint, and connecting the middle point of J3 to the left pin using 
a shorting jumper. Please review the Power Up  Sequence  section in the datasheet 
before  experimenting  with various turn on/off combinations. 
 

CAUTION: Please refer to the datasheet for the maximum  voltages on the 12V 
(PVIN) and AVIN  inputs, and maximum  slew rates for the PVIN input. 

 

STEP 6A:  Power Up/Down Behavior

 – Connect a pulse generator  (output  disabled) 

signal to the clip-on test point below  ENA and Ground. Set the pulse amplitude to swing 
from 0 to 2.5 volts. Set the pulse period to 10msec. and duty cycle to 50%. Hook up 
oscilloscope probes to ENA, SS, POK and VOUT with clean ground returns. Apply 
power to evaluation  board. Enable pulse generator output. Observe the SS capacitor 
and VOUT voltage ramps as ENA goes high and again as ENA goes low. The device 
when powered  down ramps down the output voltage in a controlled  manner before fully 
shutting down. The output voltage level when POK is asserted /de-asserted as the 
device is powered up / down may be observed as well as the clean output voltage ramp 
and POK signals. 

 

STEP 7:  External Clock Synchronization  / Spread Spectrum  Modes

: In order to 

activate this mode, it may be necessary to a solder a SMA connector at J4. Alternately 
the input clock signal leads may be directly soldered to the through holes of J4 as 
shown below.  
 

 

 

Figure 3: SMA Connector for External Clock Input 

 

 

 

GND 
 
 
Ext. Clock 

Page 4 of 10 

www.altera.com/enpirion

 

Содержание Enpirion EN2360QI

Страница 1: ...to set the output voltage to any value within the range 0 6V to 3 3V The evaluation board as shipped is populated with a 4 resistor divider option The upper resistor is fixed and has a phase lead cap...

Страница 2: ...to Enable to GND indicated as NR1 NR2 in the schematic As a result of these components there is no need for a jumper on J3 see Figure 1 and the component FB1 to the left of AVIN test point TP28 should...

Страница 3: ...lease see Figure 5 and the Bill of Materials section Figure 2 Output Voltage selection jumpersJ5 Nominal jumper position voltagesfrom left to right are 3 31V 1 8V 1 2V and 1 0V Jumper shown selects1 2...

Страница 4: ...tude to swing from 0 to 2 5 volts Set the pulse period to 10msec and duty cycle to 50 Hook up oscilloscope probes to ENA SS POK and VOUT with clean ground returns Apply power to evaluation board Enabl...

Страница 5: ...the input clock as well as to the SW test point Phase lock range can be determined by sweeping the external clock frequency up down until the device just goes out of lock at the two extremes of its r...

Страница 6: ...Enpirion Power Evaluation Board User Guide EN2360QI PowerSoC Figure 4 EvaluationBoard Top and Assembly Layers Page 6 of 10 www altera com enpirion...

Страница 7: ...EAIN VFB VFB TP5 R4 J9 Updated names for pins 53 60 and associated nets 6 27 2012 AG TP28 C16 R5 TP21 TP22 AVIN C17 EAIN VFB C19 R15 C12 R11 C13 C15 C21 R2 U1 EN2360 NC1 1 NC2 2 NC3 3 NC4 4 NC5 5 NC6...

Страница 8: ...p similar to the one shown below to measure switching signals and input output ripple to avoid noise coupling into the probe ground lead Input ripple output ripple and load transient deviation are bes...

Страница 9: ...c TSW 102 07 T S J3 1 CONNECTOR HEADER 3 POSITION Samtec TSW 103 07 T S J5 1 CONNECTOR HEADER 8 POSITION Dual Samtec TSW 104 24 T D J6 J7 J9 J11 5 BANANA JACK KEYSTONE 575 4 R1 1 RES 100K OHM 1 16W 1...

Страница 10: ...e property of their respective holdersasdescribed at www altera com common legal html Altera warrantsperformance of its semiconductor productsto current specificationsin accordance with Altera sstanda...

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