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Thank you for choosing as the hurricane core development board - learning board

Translated without permission by organicmonkeymotion.wordpress.com V1 11/01/2014

Hardware Circuit Description

Power

Use an external 5V DC power supply. Please note that the polarity of an external 5V DC power

supply is positive (+ve) with respect to center.

Clock

CPLD (pin) P12 is provided with the 50M Hz clock frequency of the active crystal U3.

I/O ports

I / O ports are assigned as follows:

LED1: P86

LED2: P87

LED3: P96

LED4: P89

LED5: P97

LED6: P91

LED7: P92

LED8: P95

LEDA : P85 LEDB : P84 LEDC : P83 LEDD : P82

LEDE : P81 LEDF : P78 LEDG : P77 LEDH : P76

When LED1 to LED8 is low, LEDA to LEDH(LEDDP)

is low to light LED segment

Содержание CPLD

Страница 1: ...or choosing as the hurricane core development board learning board www sz 21eda com Translated without permission by organicmonkeymotion wordpress com V1 11 01 2014 1 Altera CPLD learning board manual QQ 906606596 ...

Страница 2: ...z 21eda com Translated without permission by organicmonkeymotion wordpress com V1 11 01 2014 2 Contents Development board intended use 3 Development board hardware description 3 Hardware Circuit Description 4 Power 4 Clock 4 I O ports 4 LED 5 Push Buttons 5 Buzzer 6 General headers 6 ...

Страница 5: ...by organicmonkeymotion wordpress com V1 11 01 2014 5 LED I O ports are assigned as follows D30 P51 D31 P52 D32 P53 D33 P54 D34 P55 D35 P56 D36 P57 D37 P58 When the I O port is low LED will be lit Push Buttons I O ports are assigned as follows DEV_CLK P44 K1 P29 K2 P28 K3 P27 K4 P26 When a key is pressed pin will be pulled LOW ...

Страница 6: ...lopment board learning board www sz 21eda com Translated without permission by organicmonkeymotion wordpress com V1 11 01 2014 6 Buzzer Drive P50 low to make noise with Buzzer General headers I O is also brought out to general headers JP1 JP2 and JP3 ...