ZYNQ Ultr FPGA Board AXU2CGA/B User Manual
27 / 29
Amazon Store: https://www.amazon.com/alinx
Figure 18-1: Clock Source
Clock Pin Assignment:
Signal Name
Pin Name
Pin Number
PL_REF_CLK
IO_L8P_44
AB11
The level of PL_REF_CLK is +1.8V.
Part 19: ALINX Customized Fan Interface
The fan is powered by 12V, and the speed can be adjusted through the
FAN_PWM signal. For this board, will come with heatsink in fault, if you need
this fan, purchase separately.
Signal Name
Pin Name
Pin Number
FAN_PWM
IO_L11P_24
W12