12
2. Dimmer Circuit
The dimmer circuit makes the output of pin 13 of CPU (IC1) into "H" level at set
mode, so that Q9 and Q3 will turn ON to make the lamp control resistor R84
short and make its illumination bright. But on the other hand, if the dimmer
circuit makes pin 13 into "L" level, Q9 and Q3 will turn OFF, R84's illumination
will become dimmer as its hang on voltage falls down in the working LED (D11,
D2, D5, D3 and D6).
3. Reset and Backup
When the power form the DC cable increases from Circuits 0 V to 2.5 or more,
"H" level reset signal is output form the reset IC (IC4) to pin 33 of the CPU
(IC1), causing the CPU to reset. The reset signal, however, waits at 100, and
does not enter the CPU until the CPU clock (X1) has stabilized.
4. S(Signal) Meter Circuit
The DC potential of pin 16 of IC106 is input to pin 1 of the CPU (IC1), converted
from an analog to a digital signal, and displayed as the S-meter signal on the
LCD.
5. DTMF Encoder
The CPU (IC1) is equipped with an internal DTMF encoder. The DTMF signal
is output from pin 10, through R35, R34 and R261 (for level adjustment), and
then through the microphone amplifier (IC114:A), and is sent to the varicap of
the VCO for modulation. At the same time, the monitoring tone passes through
the AF circuit and is output form the speaker.
6. Tone Encoder
The CPU (IC1) is equipped with an internal tone encoder. The tone signal (67.0
to 250.3 Hz) is output from pin 9 of the CPU to the varicap (D122 and D123) of
the VCO for modulation.
7. DCS Encoder
The CPU (IC1) is equipped with an internal DCS code encoder. The code
(023 to 754) is output from pin 9 of the CPU to the varicap (D124) of the
PLL reference oscillator. When DCS is ON, DCS MUTE circuit (Q126-ON,
Q133-ON, Q132-OFF) works. The modulation activates in X103 side only.
8. CTCSS, DCS Decoder
The voice band of the AF output signal from pin 1 of IC104:A is cut by sharp
active filter IC104:B and C (VCVS) and amplified, then led to pin 4 of CPU. The
input signal is compared with the programmed tone frequency code in the
CPU. The squelch will open when they match. During DCS, Q108 is ON, C156
is working and cut off frequency is lowered.
Содержание DR-135
Страница 14: ...14 12 M3826M8L269GP XA0818 CPU Terminal Connection TOP VIEW 269 ...
Страница 23: ...23 11 M57788M XA0077 ...
Страница 31: ...31 3 LCD Assembly FF0017 NUT UE0035 FM0034 FG0305 CPU BOARD ST0064 EL0049 TL0024 DG0037 TL0023 NUT ST0068 ...
Страница 59: ...59 3 MAIN Unit Side A DR 135 UP 0400B 4 MAIN Unit Side B DR 135 UP 0400B ...
Страница 61: ...61 7 MAIN Unit Side A DR 435 UP 0415 VCO Unit Side A VCO Unit Side B 8 MAIN Unit Side B DR 435 UP 0415 ...
Страница 62: ...62 9 TNC Unit Side A UP 0402 DR 135TP only OPTION unit EJ41U 10 TNC Unit Side B UP 0402 DR 135TP only ...
Страница 65: ...65 3 MAIN Unit DR 235 TO CN6 OPTION CN7 TO CPU CN2 TO CPU CN1 TO OPTION Downloaded by RadioAmateur EU ...
Страница 67: ...67 5 TNC Unit DR 135TP only or option CN6 CN7 TO MAIN CN107 ...
Страница 68: ...68 BLOCK DIAGRAM 1 DR 135 ...
Страница 69: ...69 2 DR 235 Downloaded by RadioAmateur EU ...
Страница 70: ...70 3 DR 435 ...