Alinco DJ-438, Руководство по обслуживанию

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6. CTCSS Encoder
(67.0 to 250.3 Hz) is output from pin 9 of the CPU to the varicap (D4) of the
VCO for modulation.
The CPU (IC9) is equipped with an internal DCS code encoder. The code (023
to 754) is output from pin 9 of the CPU to the varicap (D16) of the PLL refer­
ence oscillator. When DCS is ON, DCS MUTE circuit (Q12-ON, Q18-ON, 015-
OFF) works. The modulation activates in X1 side only.
The voice band of the AF output signal from pin 10 of IC4 is cut by sharp active
filter IC7 (VCVS) and amplified, then led to pin 4 of CPU. The input signal is
compared with the programmed tone frequency code in the CPU. The squelch
will open when they match.
In the unlikely event that CPU clock noise is present on a particular operating
frequency programmed into the radio, you can shift the CPU clock frequency
to avoid the CPU clock-noise. The output signal from pin 31 of the CPU turns
on Q35. Then the oscillation frequency of X3 will be shifted about 300 ppm.
7. DCS Encoder
8. CTCSS, DCS Decoder
5) M38267M8L252GP (XA0725)
CPU
Terminal Connection
(TOP VIEW)
SEQ12 •*— [76
SEG9 - — [79
SEGA — g o
SEG7 — g T
SE G 6 -«— [82
SEG5 - — [83
SEG4 - — [84
SEG3 - — [86
SEG2 ------- [86
SEG1 ------- [87
SEGO ------- [86
VCC [ H
VREF ----- ► [90
A V S S ----- ► g T
COM3 ----- [92
C O M 2 ------- [93
C O M I - ----- [94
COMO - ----- [95
VL3 — ► [96
V L 2 ----- ► [97
M38267M8L252GP
4 6 ] ■»— - P16
4 7 ] P17
46] P20
45 ] P21
44) P22
4 3 ] ■»— - P23
42 ] - P24
41~] P25
40 ] P26
3 9 l — ► P27
36 ] VSS
1 3 — - XOUT
36 ] — XIN
35 ] — •- XCOUT
34 ] ----- XCIN
M l - ----- RESET
3 2 ] - ----- P70ANTO
6