[AKD4114-B]
[KM076604]
2009/08
- 5 -
(2)
Evaluation for DIT
Serial Data in(10pin port) – AK4114 – S/PDIF out(optical or BNC)
S/PDIF
Optical, XLR or
BNC connector
PORT2
(10pin Header)
MCLK
BICK
LRCK
DAUX
AK4114
(DIT)
AKD4114-B
ADC
MCLK
BICK
LRCK
DAUX *
* Input to the fifth pin.
MCLK, BICK, LRCK and DAUX are input the via 10pin header (PORT2: DIR).
a.
Set-up of a Bi-phase output signal
TX0 and TX1 should not select an optical connector or a BNC connector at the same time.
a-1. The data outputted from TX1 can be selected by OPS12-10 bit.
Connector
JP19 (TX1)
JP14 (TX1)
Optical (PORT4)
OPT
BNC
BNC (J4)
BNC
BNC
Table 9. Set-up of TX1
a-2. As for TX0, only the loop back mode of RX corresponds. This mode is fixed to RX0 in parallel mode. In
serial mode, it can be selected by OPS02-00 bits.
Connector
JP13 (TX0)
JP19 (TXP1)
JP14 (TXN1)
Optical (PORT4)
OPT
Open
BNC
BNC (J4)
BNC
Open
BNC
Table 10. Set-up of TX0
b.
Set-up of clock input and output
The used signals are MCLK, LRCK, BICK, and DAUX.
The signal level outputted and inputted from PORT2 is 3.3V.
PORT2
DIR
5
6
1
10
GND
GND
GND
GND
GND
MCL
K
BI
C
K
LRCK
SDTO
DAU
X
Figure 3. PORT2 pin layout
Clock PORT
I/O
MCLK PORT2
OUT
BICK
PORT2
IN / OUT
LRCK
PORT2
IN / OUT
DAUX PORT2
IN
Table 11. Clock input/output
Содержание AKD4114-B
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