– 45 –
Pin No.
Pin Name
I/O
Description
58
LRSY
O
L/R clock output terminal. (Not used)
59
DATACK
O
Bit clock output terminal. (Not used)
60
DATA
O
L/R channel data output terminal. (Not used)
61
CE
I
Chip enable signal input terminal.
62
CL
I
Data transfer clock input terminal.
63
DI
I
Data input terminal.
64
DO
O
Data output terminal. (Nch open drain output)
65
WRQ
O
Interrupt signal output terminal.
66
RES
I
LSI reset input terminal. Set to "L" when power is turned on.
67
DRF
O
Focus ON detection terminal.
68
VDD5
-
Microcomputer interface power supply terminal.
69
VSS2
-
Digital grounding terminal. (Connected to 0 V)
70
CONT3
I/O
Common input/output terminal 3. (Not used)
71
CONT2
I/O
Common input/output terminal 2. (Used as CD close switch)
72
CONT1
I/O
Common input/output terminal 1. (Used as CD open switch)
73
PDO1
O
Phase comparison output terminal 1 for internal VCO control.
74
PDO2
O
Phase comparison output terminal 2 for internal VCO control.
75
VVSS
-
Grounding terminal for internal VCO. (Connected to 0 V)
76
PCKIST
I
Resistance connection terminal for PDO1 and 2 output power supply setting.
77
VVDD
-
Internal VCO power supply terminal.
78
FR
I
Resistance connection terminal for internal VCO frequency range setting.
79
LDS
O
Laser power detection signal input terminal.
80
LDD
O
Laser power control signal output terminal.
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Содержание XR-EM52
Страница 31: ... 31 SCHEMATIC DIAGRAM 4 TUNER d u p a t o r ...
Страница 38: ... 38 IC BLOCK DIAGRAM d u p a t o r ...
Страница 39: ... 39 d u p a t o r ...
Страница 40: ... 40 FL 11 BT 193GNK GRID ASSIGNMENT AND ANODE CONNECTION GRID ASSIGNMENT ANODE CONNECTION d u p a t o r ...
Страница 46: ... 46 VOLTAGE CHART d u p a t o r ...
Страница 47: ... 47 d u p a t o r ...
Страница 48: ... 48 d u p a t o r ...
Страница 65: ... 65 CD MECHANISM EXPLODED VIEW 2 2 3ZG 2 A 3 6 2 5 1 9 10 4 7 8 d u p a t o r ...
Страница 73: ...2 11 IKENOHATA 1 CHOME TAITO KU TOKYO 110 8710 JAPAN TEL 03 3827 3111 9301944 9430209 921338 d u p a t o r ...
