Aiwa XP-SP90, Руководство по обслуживанию

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24
1 VDD2 — Power supply.
2 EASON — Not connected.
3 COMP — Not connected.
4 EAMOD — Not connected.
5 4/5BITS — Not connected
6 VSS2 — Connected to GND
7 DIT — Not connected.
8
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TEST — Not connected.
9 MCLK I 16.9344MHz clock input.
10 VSS1 — Connected to GND.
11 DATAI I Audio serial input data.
12 LRCKI I Audio serial input LR clock data.
13 BCKI I Audio serial input bit clock data.
14 BCKO O Audio serial output bit clock data.
15 LRCKO O Audio serial output LR clock data.
16 DATAO O Audio serial output data.
17 YFLG I RAM over-flow flag of signal processing IC.
18 YCLK I Frame clock for crystal oscillator system.
19 YBLCK I Subcode block cloke signal.
20
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RST I System reset terminal.
21 ESENS O Microprocessor interface status output.
22 VDD1 — Power supply.
23 EMUTE I Force mute termial.
24 ELA T I Microprocessor interface latch clock input.
25 EDATA I Microprocessor interface serial data input.
26 ECLK I Microprocessor interface shift clock input.
27 A10 — Not connected.
28
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CAS O
________
D-RAM/CAS control output.
29-32 D2, D3, D0, D1 I/O D-RAM data input/output 2, 3, 0, 1.
33
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WE O
______
D-RAM WE control.
34
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RAS O
________
D-RAM RAS control.
35-40 A9-A4 O D-RAM address 9-4.
41-44 A0-A3 O D-RAM address 0-3.
IC, SM5904AF
Description Pin No.
Pin Name I/O