Aiwa XP-SP90, Руководство по обслуживанию

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1 VSS — GND.
2 LMUT O Left channel zero detecting flag.
3 RMUT O Right channel zero detecting flag.
4 SQCK I SQSO readout clock input.
5 SQSO O Sub Q 80-bit serial output.
6 SENS O SENS output to CPU.
7 DATA I Serial data input from CPU.
8
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LAT I Latch input from CPU. Serial data is latched at the falling edge.
9 CLOK I Serial data transfer clock input from CPU.
10 SEIN I SENS input from SSP.
11 CNIN I Track jump count signal input.
12 DATO O Serial data output to SSP.
13
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LTO O Serial data latch output to SSP. Latched at the falling edge.
14 CLKO O Serial data transfer clock output to SSP.
15 SPOA I Microcomputer extended interface (input A).
16 SPOB I Microcomputer extended interface (input B).
17
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LON O Microcomputer extended interface (output).
18 FOK I Focus OK input. Used for SENS output and the servo auto sequencer.
19 VDD1 — Power supply (+3V).
20 VSS1 — GND.
21 MDP O Spindle motor servo control.
22 PWMI I Spindle motor external control input.
23 TEST I Test pin. Connected to GND.
24 TEST I Test pin. Connected to GND.
25 VPCO O Charge pump output for the wide-band EFM PLL.
26 VCKI I VCO2 oscillation input for the wide-band EFM PLL.
27 V16M O VCO2 oscillation output for the wide-band EFM PLL.
28 VCTL I VCO2 control voltage input for the wide-band EFM PLL.
29 PCO O Master PLL charge pump output.
30 FILO O Master PLL filter output.
31 FILI I Master PLL filter input.
32 AVSS — Analog GND.
33 CLTV I Master VCO control voltage input.
34 AVDD — Analog power supply (+3V).
35 RF I EFM signal input.
36 BIAS I Constant current input of the asymmetry circuit.
37 ASYI I Asymmetry comparator voltage input.
38 ASYO O EFM full-swing output (low = VSS, high = VDD).
39 LRCK O D/A interface. LR clock output f = Fs.
40 LRCKI I LR clock input.
41 PCMD O D/A interface.serial data output (two's complement, MSB first).
Description
Pin No. Pin Name I/O
IC, CXD3009Q