37
GND connection terminal. (Digital ground terminal).
External X’tal and capacitor for internal sync generator, or the external clock are
connected to this terminal. (2fsc or 4fsc).
Either the external clock input mode or the X’tal generator mode is selected by this
selector terminal. L: X’tal generator mode, H: External clock input.
Blank signal (character and the green ORed signal) is output from this terminal.
________
(MODE 0: composite sync signal is output at H.) When reset (RST terminal = L), the
X’tal clock signal is output. (It is not output when reset by the reset command).
External coil and capacitor for the character output dot clock generator are connected
to this terminal.
The character signal is output from this terminal. (MOD 0: when H, the external sync
signal identification signal is output from this terminal. This output signal tells whether
the external sync signal is present or not. When external sync signal is present, H is
________
output.) When reset (RST terminal = L), the dot clock signal (LC oscillator) is output.
(It is not output when reset by the reset command).
Enable signal for the serial data input is input to this terminal. The serial data input is
enabled at L. Pull-up resistor is built-in. (Hysteresis input).
Clock of the serial data input is input to this terminal. Pull-up resistor is built-in.
(Hysteresis input).
Serial data input terminal. Pull-up resistor is built-in. (Hysteresis input).
Power supply for the composite video signal level adjustment. (Analog power supply).
Composite video signal output terminal.
Connected to GND or not connected.
Composite video signal input terminal.
Power supply (+5V digital power supply).
Video signal for the internal sync separator circuit is input to this terminal. (When the
internal sync separator circuit is not used, the horizontal sync signal or composite sync
signal is input to this terminal).
Internal sync separator circuit bias voltage monitoring terminal.
The composite sync output signal of the internal sync separator circuit is output from
this terminal. (H: MOD 1. H: during internal sync mode. L: during external sync
mode.) (When internal sync separator circuit is not used, the SYN IN input signal is
output from this terminal).
The output signal of the SEP OUT terminal is integrated so that the vertical sync signal
is input to this terminal. An integrator circuit must be connected between the SEP
OUT terminal and this terminal. When this terminal is not used, it must be connected
to VDD1.
When selecting any of the NTSC or PAL or PAL-M or PAL-N system, the pin setting
has priority. When L, the NTSC system is selected after resetting. Selection of either
NTSC or PAL or PAL-M or PAL-N system by the command becomes effective. H:
PAL-M system.
VSS1
Xtal IN
Xtal OUT
CTRL1
BLANK
OSC IN
OSC OUT
CHARA
______
CS
SCLK
SIN
VDD2
CV OUT
NC
CV IN
VDD1
SYN IN
CTRL2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
21
IC, LC74781M-9017
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O
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Pin No.
Pin Name
I/O
Description
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QQ 376315150
9
9
2
8
9
4
2
9
8
TEL 13942296513
9
9
2
8
9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
Q
TEL 13942296513 QQ 376315150 892498299
TEL 13942296513 QQ 376315150 892498299