9 - Remote Operation
32
QPX750 Instruction Manual
9.3.3
GPIB Parallel Poll
Complete parallel poll capabilities are offered on this instrument. The Parallel Poll Enable Register is
set to specify which bits in the Status Byte Register are to be used to form the ist local message. The
Parallel Poll Enable Register is set by the *PRE<NRF> command and read by the *PRE? command. The
value in the Parallel Poll Enable Register is ANDed with the Status Byte Register; if the result is zero
then the value of ist is 0 otherwise the value of ist is 1.
The instrument must also be configured so that the value of ist can be returned to the controller
during a parallel poll operation. The instrument is configured by the controller sending a Parallel Poll
Configure command (PPC) followed by a Parallel Poll Enable command (PPE). The bits in the PPE
command are shown in the following table:
Bit 7=
X
don’t care
Bit 6=
1
Parallel Poll Enable
Bit 5=
1
Bit 4=
0
Bit 3=
Sense
Sense of the response bit; 0=low, 1= high
Bit 2=
?
bit position of the response
Bit 1=
?
Bit 0=
?
EXAMPLE
To return the RQS bit (bit 6 of the Status Byte Register) as a 1 when true and a 0 when
false in bit position 1 in response to a parallel poll operation send the following
commands:
*PRE 64<pmt>, then PPC followed by 69H (PPE)
The parallel poll response from the instrument will then be 00H if RQS is 0 and 01H if RQS
is 1.
9.4
Status Reporting
A separate error and status model is maintained for each interface instance; an interface instance is
defined as a potential connection. USB and GPIB are inherently single connections so represent one
interface instance each. LAN, however, allows for multiple simultaneous connections and therefore
represents multiple interface instances. Two interface instances are allocated to the two TCP socket
interfaces and one more is allocated to the Web page interface. Having a separate model for each
interface instance ensures that data does not get lost as many commands e.g., ‘*ESR?’ clear the
contents on read.
Error status is maintained using a set of registers; these are described in the following paragraphs and
shown on the Status Model at the end of this section.