Agilent Technologies Agilent 33500 Series, Руководство по эксплуатации и обслуживанию

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STATus Subsystem Introduction
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Enable register cleared by:
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STATus:Questionable:ENABle 0
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STATus:PRESet
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Power cycle
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*CLS does not clear enable register but it does clear event register.
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*RST does not affect this register.
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The Query reads the enable register and returns a decimal value equal to the binary-weighted sum of all bits set in
the register.ter. For example, if bit 0 (value 1) and bit 1 ( value 2) are enabled, the query r3.
STATus:QUEStionable[:EVENt]?
Queries the event register for the Questionable Data Register group . This is a read-only register; the bits are cleared
when you read the register.
Parameter Typical Return
(none) +512
Read the event register (bit 9 set):
STAT:QUES?
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Once a bit is set, it remains set until cleared by this query or *CLS .
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*RST , STATus:PRESet , and *PSC have no effect on this register.
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Query reads the event register and returns a decimal value equal to the binary-weighted sum of all bits set in the
register. For example, if bit 1 (value 2) and bit 9 ( value 512) are set, the query returns "+514".
290 Agilent 33500 Series Operating and Service Guide