2
Figure 1. CY7C63743-PXC –ADNS-6000 Optical Mouse Hardware Block Diagram
Left Button
Agilent ADNS-6000
optical mouse sensor
Wheel Button
Right Button
Z Optics
Cypress
CY7C63743-PXC
enCoRe
USB Controller
USB/PS2 Interface
MISO
MOSI
SCLK
NCS
D+/D-
SCLK/SDATA
VREG
1.3 k Ohm
Introduction to the CY7C63743-PXC
The CY7C63743-PXC is an 8-
bit RISC microcontroller with
an integrated USB Serial
Interface Engine (SIE). The
architecture executes general-
purpose instructions that are
optimized for USB
applications. The CY7C63743-
PXC has a built-in clock
oscillator and timers as well as
programmable drive strength
and pull-up resistors on each
I/O line. High performance,
low-cost human interface type
computer peripherals can be
implemented with a minimum
of external components and
firmware effort.
Serial Peripheral Interface (SPI)
The CY7C63743-PXC provides
a SPI compatible interface. The
SPI circuit supports byte serial
transfer in either Master or
Slave mode. The integrated SPI
circuit allows the CY7C63743-
PXC to communicate with
external SPI compatible
hardware, in this case the
ADNS-6000.
Hardware Implementation
The standard hardware to
implement a mouse is shown
in Figure 1. For X and Y
movement, the optical sensor
is used. The Z- wheel
movement is detected by a set
of optical sensors that output
quadrature signals. For each
button there is a switch that is
pulled up internally by the
built in pull up resistors. The
D - line is pulled up via a
1.3k ohm resistor connected to
the VREG pin.
Firmware Configurable GPIO
The reference firmware is
configured to use the GPIO
pins as shown on the
schematic in Appendix A.
However, it may be more
optimal to use a different I/O
configuration to meet the
mechanical constraints of PCB
design. The reference firmware
is designed to be easily
configured to another set of
pin connections. This is
accomplished through changes
in the I/O definitions at the
beginning of the
adns-
6000.asm
listing. The following
statements are the pin
definitions as they exist today.
The firmware will use these
definitions to read and
configure the GPIO pins,
without any other
modifications.
Communications between the
CY7C63743-PXC and the
ADNS-6000 are done through
the integrated SPI interface.
The serial port cannot be
activated while the chip is in
power down mode (NPD low)
or reset (RESET high). When
the SPI is enabled thru P0.4
(NCS), the P0.7 (SCLK), P0.6
(MISO), and P0.5 (MOSI) GPIO
pins serve special functions to
enable the SPI interface to talk
with external hardware. During
normal operation, the
CY7C63743-PXC SPI is always
configured as a Master to
output the serial clock on
P0.7. Therefore, the USB
microcontroller always initiates
communication. Data sent by
the ADNS-6000 optical sensor
is received on the P0.6 (MISO),
and data is shifted out to the
ADNS-6000 through the P0.5
(MOSI). See the schematic in
Appendix A. When writing to
the ADNS-6000, the
microcontroller drive both the
SCLK and the MOSI lines.
When reading from the ADNS-
6000, the microcontroller
drives both the SCLK and
MOSI lines initially. After
t
SRAD
delay, the ADNS-6000
will drive the data via MISO.
The microcontroller is only
driving the SCLK line (outputs
SCLK for the serial interface).
Optical Sensor
Agilent’s ADNS-6000 optical
sensor is used in this
reference design as the
primary navigation engine.
This Optical Navigation
Technology contains an Image
Acquisition System, a Digital
Signal Processor, a two
channel quadrature output,
Содержание ADNK-6003
Страница 17: ...17 Figure C2 PCB Schematic Top Layer Figure C1 PCB Schematic Bottom Layer Appendix C PCB Layout...
Страница 18: ...18 Figure C4 PCB Schematic Bottom Overlay Figure C3 PCB Schematic Top Overlay...
Страница 19: ...19 Appendix D Base Plate Feature Figure D1 Overall view of base plate...