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Handshaking

Agilent 34950A 64-Bit Digital I/O and Counter Module User’s Guide

13

Optionally, you can provide an

external

strobe input on the H2 line to

control the memory transfers. If you pace the memory inputs from an
external clock, the 34950A will sense the leading edge of the strobe and
set the data. The data will be valid after T

PD

and the receiving device may

latch the data. T

PD

ranges from 82 ns to 47 ns.

A synchronous buffered output using an external clock is shown in the
diagram below (default handshake line polarity).

For example, using the

internal

strobe, the following SCPI commands set

a 34950A in slot 5 to have a 32- bit output using synchronous handshake.
The number of times to output the traces is set to 4. A trace is then
loaded into memory and assigned to the channel. The memory is enabled
and then triggered. The start/stop line is set high following the first byte
handshake and remains high until the last byte is output.

CONF:DIG:WIDT LWOR, (@5101)

CONF:DIG:DIR OUTP, (@5101)

CONF:DIG:HAND SYNC, (@5101)

SOUR:DIG:MEM:NCYC 4, (@5101)

TRAC:DATA:DIG:LWOR (@5101), mytrace, #hFFEEFFEE, #hBCBC9999

SOUR:DIG:MEM:TRAC mytrace,(@5101)

SOUR:DIG:MEM:ENAB ON, (@5101)

SOUR:DIG:MEM:STAR (@5101)

Using an

external

strobe, the following SCPI commands set a 34950A in

slot 5 to have an 8- bit output using synchronous handshake with an
external strobe input. The number of times to output the traces is set to
infinite (continuous output until the memory is stopped). The memory is
enabled and then triggered. The start/stop line is set high following the
first byte handshake and remains high until the last byte is output.

CONF:DIG:WIDT BYTE, (@5101)

CONF:DIG:DIR OUTP, (@5101)

CONF:DIG:HAND SYNC, (@5101)

CONF:DIG:HAND:SYNC:STR:SOUR EXT, (@5101)

SOUR:DIG:MEM:NCYC 0, (@5101)

TRAC:DATA:DIG:BYTE (@5101), mytrace, 260, 139

SOUR:DIG:MEM:TRAC mytrace,(@5101)

SOUR:DIG:MEM:ENAB ON, (@5101)

SOUR:DIG:MEM:STAR (@5101)

H0 (Start

/

Sto

p

)

H

2

(

Cl

oc

k

In)

Data

Ou

t

Valid

T

CYC LE

(

La

s

t C

yc

le

)

I

n

v

alid

T

PD

T

PD

T

PD

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Содержание 34950A

Страница 1: ...Agilent Technologies Agilent 34950A 64 Bit Digital I O and Counter Module User s Guide Agilent Technologies Inc Printed in Malaysia Edition 1 June 2008 E0608 34980 90050 34980 90050 ...

Страница 2: ...tion contained herein Should Agilent and the user have a separate written agreement with warranty terms covering the material in this document that conflict with these terms the warranty terms in the sep arate agreement shall control Technology Licenses The hardware and or software described in this document are furnished under a license and may be used or copied only in accordance with the terms ...

Страница 3: ...s before removing the instrument cover Do Not Modify the Instrument Do not install substitute parts or perform any unauthorized modification to the prod uct Return the product to an Agilent Sales and Service Office for service and repair to ensure that safety features are maintained In Case of Damage Instruments that appear damaged or defec tive should be made inoperative and secured against unint...

Страница 4: ...and Counter Module User s Guide The Declaration of Conformity DoC for the 34980A mainframe instrument can be found on page iii in the 34980A Mainframe User s Guide That DoC applies to the 34980A mainframe and all available plug in modules ...

Страница 5: ...eading Digital Data 4 Writing Digital Data 5 Channel Width and Polarity Threshold Level and Drive 6 Handshaking 7 Setting the Handshake Line Parameters 8 Synchronous Handshake Mode 9 Buffered I O Operations 14 Buffered Memory Output 14 Deleting Trace 16 Buffered Memory Input 16 Interrupt Lines 18 Memory Output Operations 18 Memory Input Operations 19 Byte Ordering 20 Pattern Matching 21 Counter 22...

Страница 6: ...vi Agilent 34950A 64 Bit Digital I O and Counter Module User s Guide ...

Страница 7: ...cy counter totalizer measurement input channels and a programmable clock output for frequency synchronization or general clocking needs Bank and Channel Assignments The digital channels are numbered by bank 101 through 104 and 201 through 204 for banks 1 and 2 respectively The counter totalizer channels are assigned channel numbers 301 and 302 The programmable clock is not assigned a channel numbe...

Страница 8: ...nframe User s Guide for detailed environmental operating conditions for the 34980A mainframe and its installed modules That guidance sets maximum per channel current and power ratings at rated voltage for pollution degree 1 dry and pollution degree 2 possible condensation conditions for the Digital I O module VREF OE DOUT DIN EN Zo 10Ω 2 5 pF VTHREF 5V 1M 14 7 26 1 10K Vcc 5V 5 1V I O 1 of 64 Rpul...

Страница 9: ... bank can be control channels Width and direction of the memory operations are controlled by the width and direction of the first channel on the bank i e 101 or 201 In the SCPI language for the 34950A BYTE refers to 8 bit operations WORD refers to 16 bit operations and LWORd refers to 32 bit operations This table illustrates how the channels are numbered for each operating configuration Bank 1 Ban...

Страница 10: ...ommands The CONFigure commands set up the digital I O channel parameters For example sending the following SCPI command to a Digital I O module installed in slot 1 of the mainframe sets a 16 bit input channel 103 to use a 2 5 V input threshold and normal polarity CONF DIG WORD 2 5 NORM 1103 Once configured the data is read using the following command SENS DIG DATA WORD 1103 You may also read an in...

Страница 11: ... 1 66 V default to 5 V When the channel is set to OCOLlector lines are driven low but set to high impedance Hi Z when asserted In the open collector mode multiple lines can be connected together by providing external pull ups Once a channel has been configured write digital data to the channel using the SOURce DIGital DATA command SOUR DIG DATA LWOR 26503 1201 You may also use a hexadecimal format...

Страница 12: ...el and drive mode are unchanged when channels are combined For example consider the following command sequence CONF DIG POL NORM 1101 CONF DIG POL INV 1102 CONF DIG WIDT WORD 1101 This command sequence set the first 8 bits channel 101 to normal polarity for input and output operations set the next 8 bits channel 102 to inverted polarity and then combines the bits into a 16 bit channel When this WO...

Страница 13: ... unbuffered I O operations You can also perform unbuffered operations without any handshake The function of each line for each mode of operation is defined in the table below The following handshake command sets the synchronous handshaking mode for the channels in bank 1 CONF DIG HAND SYNC 1101 This form of the handshaking command also allows you to optionally set the input threshold output drive ...

Страница 14: ...ct all the handshake lines in the bank Handshake line polarity can be set for each individual handshake line For example you can invert the polarity of the handshake line H1 on bank 2 with the following command CONF DIG HAND POL INV H1 1201 You can set the output drive mode output voltage and input threshold for all handshake lines in each bank For example the following commands set the drive mode...

Страница 15: ...used to specify the speed in terms of time instead of a rate TCYCLE begins when the 34950A executes one of the input commands The timing should be set such that the device sending the data ensures the data lines are valid prior to TSETUP time The trailing edge of the strobe line indicates the 34950A will latch the data within the THOLD time TSETUP is 90 ns and THOLD is 0 ns Since THOLD 0 µs the se...

Страница 16: ...mmand This setting affects strobe width memory clock rate as well as the setup and hold times Alternatively the reciprocal form of the command CONFigure DIGital HANDshake CTIMe can be used to specify the speed in terms of time instead of a rate The timing should be set such that the device receiving the data can read the data lines during the TCYCLE 2 time A synchronous unbuffered output is shown ...

Страница 17: ...fter THOLD TSETUP is 46 ns and THOLD is 10 ns A synchronous buffered input using an external clock is shown in the diagram below default handshake line polarity For example the following SCPI commands set a 34950A in slot 5 to have an 8 bit input using synchronous handshake with an external strobe input The number of bytes to read into memory is set to infinite continuous reading into memory until...

Страница 18: ...lt INTernal clock is controlled by the CONFigure DIGital HANDshake RATE command This setting affects strobe width memory clock rate as well as the setup and hold times Alternatively the reciprocal form of the command CONFigure DIGital HANDshake CTIMe can be used to specify the speed in terms of time instead of a rate The timing should be set such that the device receiving the data can latch the da...

Страница 19: ...ollowing the first byte handshake and remains high until the last byte is output CONF DIG WIDT LWOR 5101 CONF DIG DIR OUTP 5101 CONF DIG HAND SYNC 5101 SOUR DIG MEM NCYC 4 5101 TRAC DATA DIG LWOR 5101 mytrace hFFEEFFEE hBCBC9999 SOUR DIG MEM TRAC mytrace 5101 SOUR DIG MEM ENAB ON 5101 SOUR DIG MEM STAR 5101 Using an external strobe the following SCPI commands set a 34950A in slot 5 to have an 8 bi...

Страница 20: ... output using the handshaking parameters set The general steps to output from memory are 1 Set the channel width and direction 2 Set the handshake mode 3 Set the trigger source 4 Set the number of times to output the trace 5 Load the trace s into memory 6 Set which trace to use 7 Enable the memory 8 Trigger the output Set the channel width and direction Use the SOURce DIGital DATA command to set t...

Страница 21: ...nabled unless the bank has a trace assigned to it For example the following commands load two traces into memory for bank 1 of a module in slot 1 In this example each byte of the LWORd to output is sent as a separate byte TRAC DATA DIG LWOR 1101 MyTrace1 255 200 128 0 TRAC DATA DIG LWOR 1101 MyTrace2 254 192 64 32 You can also send trace data in IEEE 488 block format using this command The 34950A ...

Страница 22: ...et to be the trigger source Deleting Trace You can delete traces in memory to recover the memory space Use the TRACe DELete NAME command to delete a specific trace Note that deleting a specific trace does not de fragment the memory You can delete all traces using the TRACe DELete ALL command Buffered Memory Input Each bank on the 34950A has its own memory for use in buffered transfers Changing a b...

Страница 23: ... captured data Set the desired memory retrieval format using the SENSe DIGital DATA FORMat command You can set the memory to be read as either LIST or BLOCk The LIST parameter default returns the data as comma separated ASCII values BLOCk returns the data in IEEE 488 block format Before you can read the data in memory you must stop the memory operations using the SENSe DIGital MEMory ENABle OFF co...

Страница 24: ...parameters Memory Output Operations For memory output operations the interrupt line is sensed and can be used to start or stop memory output operations This provides a hardware means to control the data output The SOURce DIGital INTerrupt MODE command sets how the bank will behave when using memory output The mode can be set to one of three values STARt The memory output will begin on the rising e...

Страница 25: ...r the interrupt line will be driven low but will go to high impedance mode when in the High state The open collector mode requires external pull ups The SENSe DIGital INTerrupt MODE command sets the condition that will cause the interrupt to be asserted When set to MFULl the interrupt is given when the memory is full When set to COMPare the interrupt is asserted when the pattern is detected see pa...

Страница 26: ...ficant byte and is output on the upper bits 8 through 15 For LWORd outputs the first byte is output on bits 24 through 31 You can change the byte order reported using the FORMat BORDer command This command allows you to swap the most significant and least significant byte ordering for all data transfer operations The command is applied globally and cannot be assigned to an individual slot or chann...

Страница 27: ...attern CONF DIG WIDT WORD 1101 CALC COMP DATA HF00F 1101 CALC COMP TYPE EQUAL 1101 SENS DIG INT MODE COMP 1101 SENS DIG INT ENAB ON 1101 CALC COMP STAT ON 1101 Once the pattern matching state is turned on the 34950A polls for the pattern HF00F to appear on the data lines of channel 101 The interrupt line will be asserted when the pattern is matched In the example above the last command CALCulate C...

Страница 28: ...et the totalizer count by setting the parameter to RRESet For example the following command configures the totalizer on the first bank initiates the measurement and returns the result The totalize count is reset when the data is read MEAS COUN TOT RRES 1301 Totalizer counts begin as soon as the channel is configured for the totalize measurement You can stop a count by sending SENSe COUNter ABORt c...

Страница 29: ...al data is gathered When the gate is internal the measurement begins as soon as the INITiate command is received Since the measurements are all derived from the same basic measurement you can retrieve the measured frequency period duty cycle and pulse width from the same initiated and gated measurement For example the following commands set the counter to measure the input signal for 1 ms using th...

Страница 30: ...utput The valid values for the clock output rate are 20 MHz 13 33 MHz 10 MHz 8 MHz 6 667 MHz 10Hz The clock output frequency will round to the nearest achievable frequency The commands used to control the clock output are SOUR MOD CLOC FREQ freq MIN MAX DEF slot SOUR MOD CLOC OFF ON 0 1 slot You can obtain the rounded value of the currently set clock frequency using the following query SOUR MOD CL...

Страница 31: ...6 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 59 58 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 Pin Signal Pin Signal Pin Signal Pin Signal 1 GND C H 3 0 1 21 GND C H 1 0 4 40 18 C H 1 0 3 60 8 CH102 2 CNTR 22 27 41 GND 61 GND 3 GND 23 GND 42 17 62 NC 4 GATE 24 26 43 GND 63 GND C H 1 0 1 5 GND 25 GND 44 16 64 7 6 INTR 26 25 45 GND C H 1 0 2 65 GND 7 GND 27 GND 46 15...

Страница 32: ...D 42 17 62 CLK 4 GATE 24 26 43 GND 63 GND C H 2 0 1 5 GND 25 GND 44 16 64 7 6 INTR 26 25 45 GND C H 2 0 2 65 GND 7 GND 27 GND 46 15 66 6 8 H2 28 24 47 GND 67 GND 9 GND 29 GND C H 2 0 3 48 14 68 5 10 H1 30 23 49 GND 69 GND 11 GND 31 GND 50 13 70 4 12 H0 32 22 51 GND 71 GND 13 GND C H 2 0 4 33 GND 52 12 72 3 14 31 34 21 53 GND 73 GND 15 GND 35 GND 54 11 74 2 16 30 36 20 55 GND 75 GND 17 GND 37 GND 5...

Страница 33: ...terminal block has screw type connections and the terminal are labeled with the channel and bit information The 34980A Product Reference CD shipped with the instrument contains a 34950T Wiring Log for you to document your wiring configuration for this module You can open the wiring log file in Microsoft Excel or Adobe Acrobat format ...

Страница 34: ...28 Agilent 34950A 64 Bit Digital I O and Counter Module User s Guide 34950T Terminal Block ...

Страница 35: ...nouts 25 E external pull ups 5 F frequency measuremets 23 H handshake input threshold 8 handshake line drive mode 8 handshake line output voltage level 8 handshake line polarity 8 handshaking 7 handshaking digital data 7 I initiated measurement mode 23 interrupt lines 18 M memory input 19 memory operations 14 P pattern matching 21 pinouts 25 R reading digital data 4 S simplified block diagram 1 sy...

Страница 36: ...30 Agilent 34950A 64 Bit Digital I O and Counter Module User s Guide Index ...

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