Advantech SOM-5991, Руководство пользователя

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SOM-5991 User Manual 38
 Hyper-Threading [ALL]
Enable Hyper Threading (Software Method to Enable/Disable Logical Processor
threads.
 Monitor/Mwait
Enable or disable the Monitor/Mwait instruction.
 Execute Disable Bit
When disabled, forces the XD feature flag to always return 0.
 Enable Intel TXT Support
Enable Intel Trusted Execution Technology Configuration. Please disable “EV
DFX Features” when TXT is enabled.
 VMX
Enable the Vanderpool Technology, takes effort after reboot.
 Enable SMX
Enables Safer Mode Extensions.
 Lock Chipset
Lock or Unlock chipset.
 MSR Lock Control
Enable – MSR 3Ah, MSR 0E2h and CSR 80h will locked. Power Good reset is
needed to remove lock bits.
 PPIN Control
Unlock and Enable/Disable PPIN Control.
 Debug Interface
MSR 0C80h bit [0], When set enables te debug features.
 Hardware Prefetcher
= MLC Streamer Prefectcher (MSR 1A4h Bit[0]).
 Adjacent Cache Prefetch
= MLC Spatial Prefectcher (MSR 1A4h Bit[1]).
 DCU Streamer Prefetch
DCU streamer prefetcher is an L1 data cache prefetcher (MSR 1A4h [2]).
 DCU IP Prefetch
DCU IP prefetcher is an L1 data cache prefetcher (MSR 1A4h [3]).
 DCU Mode
MSR 31h Bit [0] – A write of 1 selects the DCU mode as 16KB 4-way with ECC.
 Direct Cache Access (DCA)
Enables Direct Cache Access.
 DCA prefetch Delay
DCA Prefetch Delay Help.
 X2APIC
Enable/disable extended APIC support.
 AES-NI
Enable/disable AES-NI support.
 Down Stream PECI
Enables PCIe Down Stream PECI Write.
 IIO LLC Ways [19:0] (Hex)
MSR CB0_SLICE0_CR_IIO_LLC_WAYS bitmask.
 QLRU Config [63:32] (Hex)
VIRTUAL_MSR_CR_QLRU_CONFIG bitmask.