Advantech PCL-818L, Руководство пользователя

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50 PCL-818L User's Manual
The Intel 8254
The PCL-818L provides an Intel 8254 programmable interval timer/
counter, version 2. The popular 8254 offers three independent 16-bit
down counters. Each counter has a clock input, control gate and an
output. You can program each counter for maximum count values from
2 to 65535.
Version 2 of the 8254 has a maximum input clock frequency of 10 MHz.
The PCL-818L provides 1 MHz and 10 MHz input frequencies to the
8254 from an on-board crystal oscillator. Jumper JP2 controls the input
frequency. See Chapter 2 for more information.
Counters 1 and 2 on the 8254 are cascaded and operated in a fixed
divider configuration. Counter 1 input connects to the 1 MHz or 10
MHz clock frequency, and the output of Counter 1 connects to the
input of Counter 2. The output of Counter 2 is internally configured to
provide trigger pulses to the A/D converter, but you can also access it
for your own use from connector CN3 pin 37. Counter 0 is not used by
the PCL-818L and is available for your use. You can access it through
CN3 pin 18.
Counter read/write and control
registers
The 8254 programmable interval timer uses four registers at addresses
BASE+12, BASE+13, BASE+14 and BASE+15. Register functions
appear below:
Register Function
BASE+12 Counter 0 read/write
BASE+13 Counter 1 read/write
BASE+14 Counter 2 read/write
BASE+15 Counter control word
Since the 8254 counter uses a 16 bit structure, each section of read/
write data is split into a least significant byte (LSB) and most signifi-
cant byte (MSB). To avoid errors it is important that you make read/
write operations in pairs and keep track of the byte order.