Advantech PCI-1755, Руководство пользователя

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The gate input, when low, will force the output high. When the gate input goes high, the
counter will start from the initial count. You can thus use the gate input to synchronize the
counter.
With this mode the output will remain high until you load the count register. You can also
synchronize the output by software.
MODE 3
－
Square Wave Generator
This mode is similar to Mode 2, except that the output will remain high until one half of the
count has been completed (for even numbers), and will go low for the other half of the
count. This is accomplished by decreasing the counter by two on the falling edge of each
clock pulse. When the counter reaches the terminal count, the state of the output is changed,
the counter is reloaded with the full count and the whole process is repeated.
If the count is odd and the output is high, the first clock pulse (after the count is loaded )
decrements the count by 1. Subsequent clock pulses decrement the count by 2. After
time-out, the output goes low and the full count is reloaded. The first clock pulse (following
the reload) decrements the counter by 3. Subsequent clock pulses decrement the count by
two until time-out, then the whole process is repeated. In this way, if the count is odd, the
output will be high for (N+1)/2 counts and low for (N-1)/2 counts.
MODE 4
－
Software -Triggered Strobe
After the mode is set, the output will be high. When the count is loaded, the counter will
begin counting. On terminal count, the output will go low for one input clock period then
go high again.
If you reload the count register during counting, the new count will be loaded on the next
CLK pulse. The count will be inhibited while the GATE input is low.
MODE 5
－
Hardware-Triggered Strobe
The counter will start counting after the rising edge of the trigger input and will go low for
one clock period when the terminal count is reached. The counter is retriggerable.