35
Chapter 3
3.15.3 Interpolation Driving
Figure 3.23: Timing diagram of Interpolation Driving
• After interpolation command is enable, the first pulse will be outputted
in 775 nsec.
• If using pulse/direction mode, direction signal (nP-P) is valid in ± 125
nsec of high-level pulse signal.
3.15.4 Input Pulse Timing
Quadrature Pulse of Encoder Input
Figure 3.24: Timing diagram of Quadrature Pulse of Encoder Input
• The minimum difference time between A/B phases is 200 nsec.
UP/DOWN Pulse Input
Figure 3.25: Timing diagram of UP/DOWN Pulse Input
• Minimum UP/DOWN pulse width: 130 nsec.
• Minimum Increased/Decreased Pulse Interval: 130 nsec .
• Minimum UP/DOWN pulse period: 260 nsec.
Содержание PCI-1240
Страница 23: ...15 Chapter3 Figure 3 1 I O Connector Pin Assignments for PCI 1240 PCI 1240U...
Страница 46: ...PCI 1240 PCI 1240U User Manual 38...
Страница 47: ...2 APPENDIX A Specifications...
Страница 52: ...PCI 1240 PCI 1240U User Manual 44...
Страница 53: ...2 APPENDIX B Block Diagram...
Страница 55: ...2 APPENDIX C Register Structure and Format...
Страница 65: ...2 APPENDIX D Cable Pin Assignments...
Страница 66: ...PCI 1240 PCI 1240U User Manual 58 Appendix D Cable Pin Assignments...
Страница 67: ...2 APPENDIX E Wiring with Third Party Motor Drivers...
Страница 69: ...61 ChapterE Figure E 2 Wiring Diagram with Oriental LIMO EZMC Series Motor Driver...
Страница 70: ...PCI 1240 PCI 1240U User Manual 62 Figure E 3 Wiring Diagram with Panasonic MINAS A Series Motor Driver...
Страница 71: ...63 ChapterE Figure E 4 Wiring Diagram with Yaskawa SGDM Series Motor Driver...
Страница 72: ...PCI 1240 PCI 1240U User Manual 64...