Advantech MIC-5602, Руководство пользователя

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9 MIC-5602 User Manual
Chapter 2
B
oard Specification
2.2.6 SATA Interface
The 3100 chipset contains one SATA (Serial ATA) Host Controller to support a total of
six ports which are located in Bus 0, Device 31, Function 2. Three of these six ports,
namely SATA 0 and SATA 1 are routed to AMC edge connector and SATA 2 to the
CompactFlash expansion board connector for SATA-PATA interface conversion.
2.2.7 USB Host Interface
The 3100 chipset also contains one EHCI USB 2.0 Host Controller to support a total
of four ports which are located in Bus 0, Device 29, Function 7. All of them are imple-
mented in the AMC payload. Port 0 is brought to a standard USB Type A connector
on the front panel. Port 1 is connected to the on-board USB storage flash controller
(see Section 2.2.15). And, Port 2 and Port 3 are routed to AMC edge connector.
2.2.8 MMC
The MMC is a logical controller that monitors the health, status, voltages and temper-
ature of the AMC module and stores the data to a local sensor data record (SDR). It
forwards the AMC status and sensor data to the Carrier IPMC on an ATCA board or
the Carrier Manager on a MCH which sends the data to the shelf manager of the
ATCA system or the MicroTCA system, respectively. The MMC also maintains the
AMC module's FRU information repository. The MMC on the MIC-5602 is built based
on Pigeon Point Systems' (PPS) hardware/ software reference design kit for MMC.
2.2.8.1 ATMega128L Microprocessor
Atmel's ATmega128L is used as the micro controller for the MMC implementation on
the MIC-5602. As a highly integrated micro controller that has on-chip Flash,
EEPROM and SRAM memories, it contains an 8-bit AVR enhanced RISC architec-
ture as its core. The peripheral functions of the ATmega128L used in the MMC
design include the I2C controllers, 8-bit timer, watchdog timer (WDT), Analog-to-Digi-
tal Converter (ADC), and GPIO. They are responsible for the following:
! Implementing the IPMB-L interface as the communication channel between the
MMC and the Carrier IPMC
! Monitoring sensor devices
! Implementing hot-swap functionality
! Controlling various reset types
! Maintaining SDR and FRU information
2.2.8.2 IPMB Implementation
The ATmega128L AVR core has a built-in I2C controller, which is connected to the
IPMB-L interface on the AMC's edge connector. This interface provides the primary
communication mechanism between the Carrier IPMC and the MMC.
2.2.8.3 Hardware Sensors
Three types of hardware sensors are supported by the MMC. They are I2C-based
thermal, voltage, and GPIO-based sensors.
Thermal Sensors
To support the higher level management in appropriately managing the cooling
resources, the AMC module must provide reports of abnormal temperature of its
environment. It has two I2C-based thermal sensors (LM86 and LM75) attached to the
MMC. When the MMC detects that a monitored temperature sensor crosses one or
more thresholds in either direction, the MMC sends an IPMI temperature event mes-
sage to the Carrier IPMC. The Carrier IPMC, or higher level management, uses this
information to manage the cooling.