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PCM-3718H/3718HG User's Manual

OUT

CLK IN

CLK IN

OUT

COUNTER 1

COUNTER 2

1MHZ

OR

10MHZ

OSC.

PACER

7.1 The Intel 8254

The PCM-3718H/3718HG uses the Intel 8254 programmable interval
timer/counter version 2. The popular 8254 offers three independent
16-bit down counters. Each counter has a clock input, control gate
and an output. You can program each counter for maximum count
values from 2 to 65535.

Version 2 of the 8254 has a maximum input clock frequency of 10
MHz. The PCM-3718H/3718HG provides 1 MHz and 10 MHz input
frequencies to the 8254 from an on-board crystal oscillator. Jumper
JP1 controls the input frequency. See page 12 for more information.

Counters 1 and 2 on the 8254 are cascaded and operated in a fixed
divider configuration. Counter 1 input is connected to the 1 MHz or
10 MHz clock frequency, and the output of Counter 1 is connected to
the input of Counter 2. The output of Counter 2 is internally config-
ured to provide trigger pulses to the A/D converter, as shown below:

The Intel 8254 has six operational modes, from Mode 0 through
Mode 5. To generate a pacer clock, program both Counter 1 and
Counter 2 for Mode 3 (square wave generation).

Note!: Counter 0 is reserved for future development.

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Содержание 3718HG

Страница 1: ...PCM 3718H 3718HG PC 104 12 bit DAS Module with Programmable Gain User s manual ...

Страница 2: ......

Страница 3: ...dJumperSettings 10 2 3 ConnectorPinAssignments 13 2 4 HardwareInstallation 15 2 5 SoftwareInstallation 16 CHAPTER 3 Signal Connections 17 3 1 AnalogInputSignalConnections 18 3 2 ExpandingAnalogInputs 20 3 3 DigitalSignalConnections 20 CHAPTER 4 Register Structure and Format 23 4 1 A D Data Registers BASE 0 1 25 4 2 Software A D Trigger BASE 0 25 4 3 A D Range Control BASE 1 26 4 4 MUX Scan Registe...

Страница 4: ...e 38 5 5 A DDataTransfer 39 5 6 How to Make an A D Conversion 40 CHAPTER 6 Digital Input Output 41 CHAPTER 7 Programmable Pacer 43 7 1 The Intel 8254 44 7 2 Counter Read write and Control Register 45 7 3 Counter Operating Modes 48 7 4 Counter Operations 50 7 5 CounterApplications 51 CHAPTER 8 Direct Memory Access Operation 53 8 1 Using DMA Transfer with the PCM 3718H 3718HG 54 CHAPTER 9 Calibratio...

Страница 5: ...1 General Information CHAPT ER ...

Страница 6: ...um cost size and power consumption The resulting PC 104 module is fully software compatible with the PCL 818H 818HG This puts rich software support and a wide variety of external signal conditioning boards at your disposal The PCM 3718H 3718HG is excellent for data acquisition process control automatic testing and factory automation 1 2 Features 16 single ended or 8 differential analog inputs jump...

Страница 7: ...0 01 0 005 Unipolar 0 10 0 1 0 0 1 0 0 01 Maximum data throughput PCM 3718H 100 kHz PCM 3718HG variable depending on PGIA settling time Gain Speed 0 5 1 100 kHz 5 10 35 kHz 50 100 7 kHz 500 1000 770 Hz Accuracy depending on gain values PCM 3718H Gain Accuracy 0 5 1 0 01 of FSR 1 LSB 2 4 0 02 of FSR 1 LSB 8 0 04 of FSR 1 LSB PCM 3718HG Gain Accuracy 0 5 1 0 01 of FSR 1 LSB 5 10 0 02 of FSR 1 LSB 50...

Страница 8: ...t Counters 3 channels 16 bit Counter 1 and Counter 2 are permanently configured as a 32 bit programmable pacer Counter 0 is reserved for future development Time base for Counter 1 s clock input 10 MHz or 1 MHz jumper selectable General Power consumption 5VDC 180mA Typical 5VDC 400mA Max Digital I O connector 20 pin post headers for I O connection Analog input connector 20 pin post headers for I O ...

Страница 9: ...witches and VR locations Label Function J1 PC bus connector JP1 DMA level 1 or 3 and time base 1MHz or 10MHz JP2 Differential or single ended inputs JP3 DIO0 or external input P1 Analog input P2 Digital input output connector SW1 Base address VR1 A D full scale VR2 A D bipolar offset VR3 A D unipolar offset ...

Страница 10: ... voltage switching and a CJC circuit for thermocouple measurement PCLD 786 SSR I O Module Carrier Board This board holds eight opto isolated solid state relay modules and provides an additional eight outputs to drive external PCLD 785B and PCLD 885 Relay Output Boards These boards let you control relays through the PCM 3718H 3718HG 16 bit digital output channels The PCLD 785B provides 24 SPDT rela...

Страница 11: ...trol analysis and presentation development software package In addition to typical Human Machine Interface HMI functions GeniDAQ features aVisual Basic programming environment and it provides numerous graphical control and display icons to assist you in developing user s HMI ActiveDAQ ActiveDAQ is a collection of add on ActiveX Control which provides an easy to use property sheet interface for con...

Страница 12: ...AM C hannel Scan Logic D ata M U X M U X 16 S E or 8 D iff IR Q Logic D M A Logic 12 bit A D C onverter w ith Sam ple and H old Prog G ain Am plifie r O ut 1 O ut 2 C LK 1 C LK 2 ASIC A D1801 IR Q Signals D M A S ignals Addre ss B us 1 0 M H z 1 M H z R egister Select Internal D ata B us EO C D igital Input O utput E xternal Trigger A nalog Input 1 7 Block Diagram PC BUS ...

Страница 13: ...2 Installation CHAPT ER ...

Страница 14: ...vinyl and styrofoam Remove the PCM 3718H 3718HG from its protective packaging by grasping the rear metal panel Handle the module only by its edges to avoid static electricity which could damage its integrated circuits Keep the anti static packaging material for storage and protection when you have to remove the module from its connector 2 2 Switch and Jumper Settings Ease of use is the primary des...

Страница 15: ... factory If you need to adjust it to other address ranges set SW1 by referring to the following table Module I O addresses SW1 Range hex Switch position 1 2 3 4 5 6 000 00F l l l l l l 010 01F l l l l l 200 20F l l l l l 210 21F l l l l 300 30F l l l l 3F0 3FF Off l On default Note Switches 1 6 of the SW1 control the PC bus address lines as follows Switch 1 2 3 4 5 6 Line A9 A8 A7 A6 A5 A4 ...

Страница 16: ...wing equation gives the pacer rate Pacer rate Fclk Div1 Div2 Fclk 1MHz or 10MHz is set by JP1 as illustrated above Div1 and Div2 are dividers set in counter 1 and counter 2 in the Intel 8254 counter See page 51 for more information on the counter timer applications Channel configuration S E or diff JP2 The PCM 3718H 3718HG offers 16 single ended or eight differential analog input channels Jumper J...

Страница 17: ... two on board 20 pin flat cable connectors insulation displacement mass termination The figure on page 5 shows locations of both connectors Refer to the table below for abbreviations of the pin assignment Abbreviations Description A D S Analog input single ended A DH Analog input high differential A D L Analog input low differential A GND Analog ground DIO Digital input output D GND Digital and po...

Страница 18: ...ion Connector P1 Analog input differential ended operation Connector P2 Digital input output A D H 0 A D H 1 A D H 3 A D H 2 A D H 4 A D H 6 A D H 5 A D H 7 A G ND A G ND 1 2 3 4 5 6 7 10 9 12 8 11 20 15 16 17 18 19 13 14 A D L4 A G ND A G ND A D L1 A D L0 A D L3 A D L7 A D L5 A D L6 A D L2 D IO 0 D IO 2 D IO 6 D IO 4 D IO 8 D IO 12 D IO 10 D IO 14 D G ND 1 2 3 4 5 6 7 10 9 12 8 11 20 15 16 17 18 ...

Страница 19: ...the connector J1 of the PCM 3718H 3718HG to the PC 104 connector Carefully align the pins to the PC 104 connector Slide the module into the connector The module pins may not slide all the way into the connector do not force the pins into place or the module may be damaged 6 Fasten the module to the CPU card by using the included brass screw Screw the brass spacer into the threaded hole on the CPU ...

Страница 20: ... driver lets you use standard functions written in common programming languages to operate the PCM 3718H 3718HG You do not need to perform detailed register programming The driver supports the following languages Microsoft Visual Basic Visual C Borland C C Builder and Delphi Please refer to the Software Driver User s Manual for more information 2 Demonstration programs 3 A calibration program 4 A ...

Страница 21: ...3 Signal Connections CHAPT ER ...

Страница 22: ...ed channel connections Single ended connections use only one signal wire per channel The voltage on the line refers to the common ground on the card A signal sources without a local ground is called a floating source It is fairly simple to connect a signal ended channel to a floating signal source A standard wiring diagram looks like this Differential channel connection The differential input conf...

Страница 23: ...void the ground loop noise effect caused by common mode voltages connect the signal ground to the LOW input Do not connect the LOW input to the PCM 3718H 3718HG ground directly In some cases you may also need a wire connection between the PCM 3718H 3718HG ground and the signal source ground for better grounding The following two diagrams show correct and incorrect connections for a differential in...

Страница 24: ...8115 Screw terminal Board makes wiring connections easy It provides 20 pin flat cable connectors and a CJC Cold Junction Compensation circuit which lets you directly measure thermocouples You can handle all types of thermocouples with software compensation and linearization Special circuit pads on the PCLD 8115 accommodate passive signal contioning components You can easily implement a low pass fi...

Страница 25: ... Signal Connections 21 To receive an OPEN SHORT signal from a switch or relay add a pull up resistor to ensure that the input is held at a high level when the contacts are open See the figure below D GND 4 7K 5V ...

Страница 26: ...22 PCM 3718H 3718HG User s Manual ...

Страница 27: ...4 Register Structure and Format CHAPT ER ...

Страница 28: ...the layout and function of each of the card s registers I O port address map The following table shows the function of each register or driver and its address relative to the base address of the module I O port address assignments Address Read Write BASE 0 A D low byte channel SoftwareA D trigger BASE 1 A D high byte A D range control BASE 2 MUX scan MUX scan channel range control pointer BASE 3 D...

Страница 29: ...ly A D high byte Bit D7 D6 D5 D4 D3 D2 D1 D0 Value AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD11 toAD0 Analog to digital data AD0 is the least significant bit LSB of the A D data and AD11 is the most signifi cant bit MSB C3 to C0 A D channel number from which the data is derived C3 is the MSB and C0 is the LSB 4 2 Software A D Trigger BASE 0 You can trigger an A D conversion from software the module s on...

Страница 30: ...scan described in the next section then write the range code to bits 0 to 3 of BASE 1 BASE 1 write only A D range control code Bit D7 D6 D5 D4 D3 D2 D1 D0 Value N A N A N A N A G3 G2 G1 G0 PCM 3718H range code Input Range V Unipolar Bipolar Range Code G3 G2 G1 G0 5 B 0 0 0 0 2 5 B 0 0 0 1 1 25 B 0 0 1 0 0 625 B 0 0 1 1 0 to 10 U 0 1 0 0 0 to 5 U 0 1 0 1 0 to 2 5 U 0 1 1 0 0 to 1 25 U 0 1 1 1 10 B ...

Страница 31: ... Scan Register BASE 2 Read write register BASE 2 controls multiplexer MUX scanning The high nibble provides the stop scan channel number and the low nibble provides the start scan channel number The MUX initializes automatically to the start channel when you write to this register Each A D trigger sets the MUX to the next channel With continuous triggering the MUX will scan from the start channel ...

Страница 32: ...e range code written to the register BASE 1 is for channel N Programming example This C code sets the range for channel 5 to 0 625 V OUTPORTB BASE 2 5 SET POINTERTO CHANNEL 5 OUTPORTB BASE 1 3 RANGE CODE FOR 0 625V Note The MUX start stop channel changes each time when you change the input range Do not forget to reset the MUX start and stop channels to the correct values after your range setting 4...

Страница 33: ... D7 D6 D5 D4 D3 D2 D1 D0 Value DIO15 DIO14 DIO13 DIO12 DIO11 DIO10 DIO9 DIO8 BASE 11 write port DIO high byte Bit D7 D6 D5 D4 D3 D2 D1 D0 Value DIO15 DIO14 DIO13 DIO12 DIO11 DIO10 DIO9 DIO8 4 6 A D Status Register BASE 8 Read only register BASE 8 provides information on the A D configu ration and operation Writing to this I O port with any data value clears its INT bit The other data bits do not c...

Страница 34: ...rol register BASE 9 is set an interrupt signal will be sent to the PC bus through interrupt level IRQn where n is specified by bits I2 I1 and I0 of the control register Though the A D status register is read only writing to it with any value clears the INT bit CN3 to CN0 When EOC 0 these status bits contain the channel number of the next channel to be converted Remarks If you trigger the A D conve...

Страница 35: ...rupts If DMAE 0 the PCM 3718H 3718HG will generate an interrupt when it completes an A D conversion Use this setting for interrupt driven data transfer If DMAE 1 the PCM 3718H 3718HG will generate an interrupt when it receives a T C terminal count signal from the PC s DMA controller indicating that a DMA transfer has been completed Use this setting for DMA data transfer The DMA transfer is stopped...

Страница 36: ...hese signals cause the 8237 DMA controller to transfer two bytes of conversion data from the PCM 3718H 3718HG to memory Note You must program the PC s 8237 DMA controller as the DMA page register before you set DMAE to1 ST1 to ST0 Trigger source Trigger source ST1 ST0 Software trigger 0 X External trigger 1 0 Pacer trigger 1 1 4 8 Pacer Enable Register BASE 10 Register BASE 10 enables or disables ...

Страница 37: ...cer Registers BASE 12 13 14 15 These four registers located at addresses BASE 12 BASE 13 BASE 14 and BASE 15 are used for the Intel 8254 programmable pacer Please refer to Chapter 7 Programmable Pacer or 8254 product literature for detailed application information ...

Страница 38: ...34 PCM 3718H 3718HG User s Manual ...

Страница 39: ...5 A D Conversion CHAPT ER ...

Страница 40: ...therefore stores A D data in two registers located at addresses BASE 0 and BASE 1 It stores the A D low byte data in bits D4 to D7 AD0 to AD3 of BASE 0 and high byte data in bits D0 to D7 AD4 to AD11 of BASE 1 The least significant bit is AD0 and the most significant bit is AD11 You can read the source channel number corresponding to the A D data from bits D0 to D3 C0 to C3 of BASE 0 A D data regi...

Страница 41: ...ed by a range code stored in the on board RAM Please refer to pages 26 27 A D Range Control for more information 5 3 MUX Setting The PCM 3718H 3718HG offers 16 single ended or eight differential analog input channels Set jumper JP2 for the channel configuration before you set the multiplexer scan range The MUX scan register specifies the high and low limits of the scan range The MUX scan register ...

Страница 42: ...l settings by writing directly to the MUX scan register Use the MUX scan register to assign to a specified channel when you set channel input ranges with BASE 1 After you set the input range you will need to reset the MUX register for the proper start and stop channels 5 4 Trigger Mode You can trigger an A D conversion from software from the module s on board pacer or from an external signal Bits ...

Страница 43: ...s been triggered your applica tion program checks the INT bit data valid of the A D status register When it detects that the INT bit is on 1 it sends the A D data to the PC s memory using DMA Reset the INT bit by writing to register BASE 8 with any value after you transfer the A D data When you use software triggering you can check either the INT or EOC bits for data validity Since you use the pro...

Страница 44: ...pera tions 5 6 How to Make an A D Conversion To perform A D conversion you can write all I O port instructions directly in your program or you can take advantage of the PCM 3718H 3718HG driver We suggest that you apply the driver func tions in your program This will make your programming job easier and improve the program performance See the User s Manual of the software driver for more informatio...

Страница 45: ...6 Digital Input Output CHAPT ER ...

Страница 46: ...O6 DIO5 DIO4 DIO3 DIO2 DIO1 DIO0 BASE 3 write port DIO low byte Bit D7 D6 D5 D4 D3 D2 D1 D0 Value DIO7 DIO6 DIO5 DIO4 DIO3 DIO2 DIO1 DIO0 BASE 11 read port DIO high byte Bit D7 D6 D5 D4 D3 D2 D1 D0 Value DIO15 DIO14 DIO13 DIO12 DIO11 DIO10 DIO9 DIO8 BASE 11 wirte port DIO high byte Bit D7 D6 D5 D4 D3 D2 D1 D0 Value DIO15 DIO14 DIO13 DIO12 DIO11 DIO10 DIO9 DIO8 Using the PCM 3718H 3718HG s input an...

Страница 47: ...7 Programmable Pacer CHAPT ER ...

Страница 48: ...z and 10 MHz input frequencies to the 8254 from an on board crystal oscillator Jumper JP1 controls the input frequency See page 12 for more information Counters 1 and 2 on the 8254 are cascaded and operated in a fixed divider configuration Counter 1 input is connected to the 1 MHz or 10 MHz clock frequency and the output of Counter 1 is connected to the input of Counter 2 The output of Counter 2 i...

Страница 49: ... BASE 15 Counter control word Since the 8254 counter uses a 16 bit structure each section of read write data is split into a least significant byte LSB and most significant byte MSB To avoid errors it is important that you make read write operations in pairs and keep track of the byte order The data format for the control register appears below BASE 15 8254 control standard mode Bit D7 D6 D5 D4 D3...

Страница 50: ... triggered strobe 1 0 1 5 Hardware triggered strobe BCD Select binary or BCD counting BCD Type 0 Binary counting 16 bits 1 Binary coded decimal BCD counting If you set the module for binary counting the count can be any number from 0 up to 65535 If you set it for BCD Binary Coded Decimal counting the count can be any number from 0 to 9999 If you set both SC1 and SC0 bits to 1 the counter control r...

Страница 51: ...f the counter read write register then becomes BASE 12 13 14 status read back mode Bit D7 D6 D5 D4 D3 D2 D1 D0 Value OUT NC RW1 RW0 M2 M1 M0 BCD OUT Current status of counter output NC Null count is 1 when the last count written to the counter register has been loaded into the counting element The pacer enable register located at address BASE 10 has a close relationship with the counter operation ...

Страница 52: ...e terminal count If you load a new count value while the output is low the new value will not affect the duration of the one shot pulse until the succeeding trigger You can read the current count at any time without affecting the one shot pulse The one shot is retriggerable thus the output will remain low for the full count after any rising edge at the gate input MODE 2 Rate Generator The output w...

Страница 53: ... low and the full count is reloaded The first clock pulse following the reload decrements the counter by 3 Subsequent clock pulses decrement the count by two until timeout then the whole process is repeated In this way if the count is odd the output will be high for N 1 2 counts and low for N 1 2 counts MODE 4 Software triggered strobe After the mode is set the output will be high When the count i...

Страница 54: ...ack Command The 8254 counter read back command lets you check the count value programmed mode and current states of the OUT pin and Null Count flag of the selected counter s You write this command to the control word register Format is as shown at the beginning of the chapter The read back command can latch multiple counter output latches Simply set the CNT bit to 0 and select the desired counter ...

Страница 55: ...nversion trigger pulses Counter 0 is reserved for later module development Setting the Pacer Rate The following equation gives the pacer rate Pacer rate FCLK C1 C2 FCLK is either 1 MHz or 10 MHz as set by jumper JP1 The follow ing steps tell you how to set the counter modes and constants 1 Set Counter 1 to Mode 3 by writing 76h to address BASE 15 2 Set Counter 2 s divisor constant C1 by writing to...

Страница 56: ... KHz It uses FCLK of 10 MHz C1 of 40 and C2 of 10 25KHz 19 MHz 40 10 OUTPORTB BASE 3 0x76 SET COUNTER 1TO MODE 3 OUTPORTB BASE 1 40 WRITE LOW BYTE OF C1 OUTPORTB BASE 1 0 WRITE HIGH BYTE OF C1 OUTPORTB BASE 3 0xB6 SET COUNTER 2TO MODE 3 OUTPORTB BASE 2 10 WRITE LOW BYTE OF C2 OUTPORTB BASE 2 0 WRITE HIGH BYTE OF C2 ...

Страница 57: ...8 Direct Memory Access Operation CHAPT ER ...

Страница 58: ...pplications Each channel has two associated control signals The DMA Request Signal DRQ triggers a DMA operation and the DMA Acknowledge Signal DACK authorizes the 8237 to start the data transfer The 8237 DMA chip has four operating modes single demand block and cascade and four control registers These registers are 1 Operation mode register set mode of operation 2 Address register specify memory s...

Страница 59: ...or more information 3 If you choose to conduct your own DMA operation you will need to have a solid understanding of the PC 8237 DMA controller and the PCM 3718H 3718HG Make sure you perform the following steps in your DMA transfer a Initialize the 8237 DMA controller register and page register b Send DMA enable and trigger source data to the PCM 3718H 3718HG control register located at address BA...

Страница 60: ...56 PCM 3718H 3718HG User s Manual ...

Страница 61: ...9 Calibration CHAPT ER ...

Страница 62: ...u need a 4 digit digital multimeter and a voltage calibrator or a stable noise free D C voltage source 9 1 VR Assignment The five variable resistors VRs on the PCM 3718H 3718HG board help you make accurate adjustments on all A D See the figure on page 5 for the VR locations on the board The following list shows the function of each VR VR Function VR1 A D full scale adjustment VR2 A D bipolar offse...

Страница 63: ...ource with a value of 4094 5 LSB to A D channel 0 4 Adjust VR1 until the A D reading flickers between 4094 and 4095 5 Repeat steps 2 to step 4 adjusting VR1 and VR2 6 Select unipolar input configuration Connect an external DC voltage source with a value of 0 5 LSB to A D channel 0 Adjust VR3 until the reading of the A D flickers between 0 and 1 ...

Страница 64: ...60 PCM 3718H 3718HG User s Manual ...

Страница 65: ...A A P P E N D I X Software Driver User Note ...

Страница 66: ...D conversion with software data transfer Func 6 PerformA D conversion with DMA data transfer Func 7 Get Func 6 s operational status Func 8 Stop Func 6 Func 9 PerformA D conversion with interrupt data transfer Func 10 Get Func 9 s operational status Func 11 Stop Func 9 Func 12 D A Initialization Func 13 Perform D A conversion with software data transfer Func 14 Perform D A conversion with DMA data ...

Страница 67: ...t digital output status Func 31 Perform digital output with DMA data transfer Func 32 Get Func 31 s operational status Func 33 Stop Func 31 Func 34 Perform digital output with interrupt data transfer Func 35 Get Func 34 s operational status Func 36 Stop Func 34 Func 37 Timer initialization Func 38 Timer interrupt enable Func 39 Timer interrupt disable Func 40 Frequency measurement start Func 41 Ge...

Страница 68: ... D initialization Func 97 Perform daughterboardA D conversion with software or interrupt data transfer Func 98 Get Func 97 s status Func 99 Stop Func 97 Func 100 Block channel scan initialization Func 101 Perform Block channel scan with software data transfer Func 105 Perform Block channel scan with interrupt data transfer Func 106 Get Func 105 s status Func 107 Stop Func 105 ...

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