LEC-iMX8M User’s Guide
SGET SMARC Rev 2.1
Page 9
copyright © 2021 ADLINK Technology Inc.
2.
Specifications
2.1
Core System
SoC
NXP iMX 8M Series
i.MX8M Quad:
4 x Cortex-A53 at 1.3 - 1.5GHz, 1 x Cortex-M4, GPU, VPU Decode
i.MX8M QuadLite:
4 x Cortex-A53 at 1.3 - 1.5GHz, 1 x Cortex-M4, GPU
i.MX8M Dual:
2 x Cortex-A53 at 1.3 - 1.5GHz, 1 x Cortex-M4, GPU, VPU Decode
available either as industrial (-40°C to +85°C) or commercial (0°C to +70°C) type"
L2 Cache
32 KB I-cache 32 KB D-cache (A53) & 16 KB I-cache16 KB D-cache (M4)
Memory
1 / 2 / 4 GB DDR3L memory down
IoT security
CryptoAuthentication™ Device, Microchip ATECC608A
Cryptographic co-processor with secure hardware-based key storage
Protected storage for up to 16 Keys, certificates or data
ECDH: FIPS SP800-56A Elliptic Curve Diffie-Hellman
NIST standard P256 elliptic curve support
SHA-256 & HMAC hash including off-chip context save/restore
AES-128: encrypt/decrypt, galois field multiply for GCM
Содержание SMARC NXP LEC-IMX8M
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