LEC-EL Product specification
SGET SMARC Rev 2.1
Page 3
copyright © 2021 ADLINK Technology Inc.
4.3.3
MIPI Camera support
4.3.3.1
MIPI CSI0
This design does not support CSI
4.3.4
HDA (Audio)
Name
Pin # Description
I/O
Type
I/O
Level
Power
Domain
PU / PD
Comments
HDA_SYNC /
I2S2_LRCK
S50
High Definition Audio Sample
synchronization clock to codec
I/O
CMOS
1.8V / 1.5V
Runtime
SMARC HDA Audio signalling supports 1.5V or 1.8V.
Please check with your module vendor if 1.5V or 1.8V is
supported and use an audio codec that is capable to support the
regarding I/O voltage. This specification ignores the discrepancy
between the 1.5V and 1.8V signalling, as the chance of damage in
mismatched systems is negligible.
The SMARC HD Audio pins are shared with the I2S2 pins, which
are defined to be 1.8V only.
HDA_SDO /
I2S2_SDOUT
S51
High Definition Audio data out to
codec
O
CMOS
1.8V / 1.5V
Runtime
HDA_SDI /
I2S2_SDIN
S52
High Definition Audio data in from
codec
I/O
CMOS
1.8V / 1.5V
Runtime
HDA_CK /
I2S2_CK
S53
High Definition Audio clock to
codec
O
CMOS
1.8V / 1.5V
Runtime
HDA_RST# /
GPIO4
P112
High Definition Audio reset output
to codec, low active.
O
CMOS
1.8V / 1.5V
Runtime
Note
: support for I2S1 signalling pins has been removed during update to SMARC 2.0 specification
Содержание SMARC MODULE LEC-EL
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