Operation Theory
21
3.2.2
Basic Acquisition Timing
The PCIe-9842 begins acquisition process when it receives a trig-
ger event. The trigger event comes from software command or
external digital trigger. The Timebase is a clock that sent to the
ADC and the acquisition engine for essential timing functionality.
The Timebase is from onboard 200MHz oscillator. To achieve dif-
ferent sampling rate, a can interval counter is used.
Refer to Figure 3-3 and use post-trigger mode as an example.
When a trigger is accepted by digitizer, the acquisition engine of
the digitizer will begin to acquire data that coming from ADC and
store these sampled data to onboard FIFO. When FIFO is not
empty, data will be transferred to system memory immediately
through the DMA engine. The sampled data is generated continu-
ously at the rising edge of Timebase according to the scan interval
counter setting. While sampled data reaches customer specified
number, in this example is 256, the acquisition ends.
Figure 3-3: Basic Acquisition Timing of Digitizer
To achieve different sampling rate other than 200MS/s, user can
specify a number for scan interval counter. For example, if you set
the scan interval counter as 2, the equivalent sampling rate is
200MS/s / 2 = 100MS/s. If you set the scan interval counter as 3,
the equivalent sampling rate is 200MS/s / 3 = 66.66MS/s, vice
versa. Refer to Figure 3-4 for detail timing. The scan interval coun-
ter is 16-bit in width, therefore the lowest sampling rate is
3.051KS/s (200MS/s / 65535).
TIMEBASE
DATA
D1
D253
D254
Acquisition
In Progress
Trigger
Acquisition starts right after this clock edge
D2
D3
D4
D255
D256
Analog
signal
Trigger mode = post-trig ger, DataCnt = 256, ScanIntrv = 1
Содержание PCIe-9842
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