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60
Operation
Theory
PCI-9524
ADLINK Technology Inc.
User’s Manual
Copyright 2008
In order to improve filter settling time, a threshold detection block
was added in front of each digital filter bank. The threshold detec-
tion block continuously compares the previous output from the dig-
ital filter, to the current conversion results from the ADC. Once the
difference exceeds a predefined threshold, the filter is com-
manded to flush its internal data with the new data. Please note
that the threshold counts mentioned hereafter are in terms of ADC
binary counts, not voltage level.
To select an appropriate threshold value, however, is a complex
process. First, a too-low settling will falsely flush the digital filter
due to system noise; whereas a too-high settling will not improve
the filter's settling time. Second, system noise grows proportionally
to ADC sampling rates.
PCI-9524 is shipped with a set of predefined threshold values as
listed in Table 4-3, one for each given sampling rate, as listed in
Table 4-1. The listed figures are a good starting point to top up
threshold counts if your transducer or environment is too noisy.
The predefined thresholds are actually two times the peak-to-peak
noise code deviation of the given sampling rate, as compared to a
350
Ω
, 3mV/V bridge simulator in our lab experiments.