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BIOS Configuration
System BIOS Cacheable
When this function is enabled, the BIOS ROM’s addresses at
F0000H-FFFFFH will be duplicated into the SRAM. It will work with the
cache controller that is enabled.
Enabled
BIOS access cached
Disabled <Default>
BIOS access not cached
Video BIOS Cacheable
As with caching the system BIOS above, enabling the Video BIOS cache
will cause access to Video BIOS addressed at C0000H to C7FFFH to be
cached, the cache controller is also enabled.
Enabled
Video BIOS access cached
Disabled <Default>
Video BIOS access not cached
Memory Hole at 15MB - 16MB
In order to improve performance, certain space in memory can be reserved
for ISA cards. This field allows you to reserve 15MB to 16MB memory
address space to ISA expansion cards. This makes memory from 15MB
and up unavailable to the system. Expansion cards can only access
memory up to 16MB. By default, this field is set to
Disabled
.
CPU Latency Timer
When
Disabled
, a “deferrable” CPU cycle will be deferred immediately after
the chipset receives another ADS#. The default is
Disabled
.
Delayed Transaction
The chipset has an embedded 32-bit posted write buffer to support delay
transactions cycles. Select
Enabled
to support compliance with PCI
specification version 2.1. The default setting is
Enabled
.
On-Chip Video Window Size
Select the on-chip video window size for VGA driver use. The default is
64MB
.
Содержание NuPRO-775 Series
Страница 1: ...NuPRO 775 Series Half Size Socket 370 Pure PCI Industrial SBC User s Guide Recycled Paper ...
Страница 2: ......
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Страница 14: ...8 Introduction Figure 1 Layout of key components ...
Страница 15: ...Introduction 9 Figure 2 NuPRO 775 Mechanical Drawing ...
Страница 19: ...Installations 13 Figure 3 Connector location on the NuPRO 775 ...