Award BIOS Setup
45
AGP Driving Value:
This function allows you to manually select the AGP driving value.
Options Min = 0000, Max = 00FF
AGP Fast Write:
Select Enabled to allow Fast Write Protocol for 4X AGP to function.
The choice: Enabled, Disabled.
AGP Master 1 WS Write / Read:
Writes/Read to the AGP (Accelerated Graphics Port) are executed with one
wait states.
The choice: Enabled, Disabled.
CPU & PCI Bus Control:
Phoenix - AwardBIOS CMOS Setup Utility
CPU & PCI Bus Control
CPU & PCI Write Buffer
PCI Master 0 WS Write
PCI Delay Transaction
Enabled
Enabled
Disabled
Item Help
____________________________
Menu Level
Ø
↑↓→←
Move Enter: Select +/-/PU/PD: Value F10: Save ESC: Exit F1: General Help
F5: Previous Values F6: Fail-safe defaults F7: Optimized Defaults
CPU & PCI Write Buffer:
This item can enable CPU to PCI bus POST write.
The choice: Enabled, Disabled.
PCI Master 0 WS Write:
When Enabled, Writes to the PCI bus are commanded with zero wait states.
The choice: Enabled, Disabled.
PCI Delay Transaction:
The chipset has an embedded 32-bit posted write buffer to support delay
transactions cycles. Select
“
Enabled
”
to support compliance with PCI
specification version 2.1.
The choice: Enabled, Disabled.
System BIOS Cacheable:
This item allows the system to be cached in memory for faster execution.
The choice: Enabled, Disabled.
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