ADLINK Technology Express-KL, Руководство пользователя

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Express-KL
BIOS Setup
63
Feature Options Description
PCIE LTR Lock
Disabled
Enable
PCIE LTR Configuration Lock.
PCH PCIe CLKREQ#
Configuration
Info
PCIEX CLKREQ Mappin
Override Default
No CLKREQ
Customer number
PCIE CLKREQ Override for default platform mapping.
7.3.7.2. PCI and PCIe > PEG Configuration
Feature Options Description
PEG Configuration Info only
PEGX
Not Present
Display PEGX present or not.
Enable Root Port Disabled
Enabled
Auto
Enable/Disable the Root Port.
Max Link Speed
Auto
Gen1
Gen2
Gen3
Configure 0:1:X Max Speed
PEG0 Slot Power Limit Value
75
Sets the upper limit on power supplied by slot. Power
limit (in watts) is calculated by multiplying this value by
the Slot Power Limit Scale. Values 0-255
PEG0 Slot Power Limit Scale
1.0x
0.1x
0.01x
0.001x
Select the scale used for the Slot Power Limit Value.
PEGX Physical Slot Number 1 Set the physical slot number attached to this Port. The
number has to be globally unique within the chassis.
Values 0-8191
Detect Non-compliance Device
Disabled
Enable
Detect Non-Compliance PCI Express Device in PEG.
Program PCIe ASPM after
OpROM
Disabled
Enabled
Enabled: PCIe ASPM will be programmed after
OpROM.
Disabled: PCIe ASPM will be programmed before
OpROM.
Program Static Phase1 Eq
Enabled
Disable
Program Phase1 Presets/CTLEp
Gen3 Root Port Preset Value for
each lane 0~15
7
Root Port preset value per lane for Gen3 Equalization
Gen3 Endpoint Preset
value for
each Lane 0~15
7
Endpoint preset value per lane for Gen3 Equalization
Gen3 Endpoint Hint value
for
each Lane 0~15
2
Endpoint Hint value per lane for Gen3 Equalization
PEG Gen3 RxCTLE Control 0~7
0
PEG Gen3 RxCTLE Control per Bundle
Always Attempt SW EQ
Disabled
Enabled
Always Attempt SW EQ, even it has been done once