AmITX-SL-G
BIOS Setup
53
Feature
Options
Description
VT-d
Disabled
Enabled
VT-d capability
Intel(R) Speed Shift Technology
Disabled
Enabled
Enable/Disable Intel(R) Speed Shift Technology
support. Enabling will expose the CPPC v2 interface
to allow for hardware controlled P-states.
Intel(R) SpeedStep(tm)
Disabled
Enabled
Enabled/Disabled Intel SpeedStep.
Turbo Mode
Disabled
Enabled
Enabled/Disabled Intel turbo mode.
Package Power Limit MSR Lock
Disabled
Enabled
Enable/Disable locking of Package Power Limit
settings. When enabled, PACKAGE_POWER_LIMIT
MSR will be locked and a reset will be required to
unlock the register.
Power Limit 1 Override
Disabled
Enabled
Enable/Disable Power Limit 1 override. If this option
is disabled, BIOS will program the default values for
Power Limit 1 and Power Limit 1 Time Window.
Power Limit 2 Override
Disabled
Enabled
Enable/Disable Power Limit 2 override. If this option
is disabled, BIOS will program the default values for
Power Limit 2.
Power Limit 2
Info only
Platform Power Limit 1 Power in Mili Watts. BIOS will
round to the nearest 1/8W when programming. Any
value can be programmed between Max and Min
Power Limits (specified by
PACKAGE_POWER_SKU_MSR). For 12.50W, enter
12500. This setting will act as the new PL1 value for
the Package RAPL algorithm.
CPU C states
Disabled
Enabled
Enabled/Disabled CPU C states
Enhanced C-states
Disabled
Enabled
Enable/Disable C1E. When enabled, CPU will switch
to minimum speed when all cores enter C-State
Package C State limit
C0
C2
C3
C6
C7
C7s
C8
Auto
Maximum Package C State Limit Setting. CPU
Default: Leaves to Factory default value.Auto:
Initializes to deepest available Package C State Limit.
Содержание AmITX-SL-G
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