ADLINK Technology ACL -6128, Руководство пользователя

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Low-Level Programming
3.2 D/A Data Format
The base address from Base+0 to Base+3 are used for D/A conversion.
The analog output channels and its corresponding registers are
specified by table 3.2, and the details is described as follows.
CH NO. CHANNEL 1 CHANNEL 2
High byte Base+0 Base+2
Low byte Base+1 Base+3
Table 3.2
Address : BASE + 0 & BASE + 1
Attribute:
write only
Data Format : (for D/A Channel 1)
Bit 7 6 5 4 3 2 1 0
Base + 0 X X X X DA11 DA10 DA9 DA8
Base + 1 DA7 DA6 DA5 DA4 DA3 DA2 DA1 DA0
Address : BASE + 2 & BASE + 3
Attribute:
write only
Data Format: (for D/A Channel 2)
Bit 7 6 5 4 3 2 1 0
Base + 2 X X X X DA11 DA10 DA9 DA8
Base + 3 DA7 DA6 DA5 DA4 DA3 DA2 DA1 DA0
DA11 .. DA0:
Digital to Analog data.
DA0
is Least Significant Bit, and
DA11
is Most Significant Bit.
X:
Don't care.
Double Buffering :
Since the data of ACL-6128 is represented by 12 bits for digital-to-analog
conversion, it has to write to the D/A converter in 2 consecutive bytes. The
first byte contains the 4 most signification bits of the data. The second
byte contains the least signification 8 bits of the data. The most
signification byte is written first and is stored in an intermediate register
in the D/A (not released to D/A ) converter. After the least signification
byte is written, it will be combined with the stored most significant data
and presented to the D/A converter, thus assuring a single-step update.
This is known as the double buffering.