XMC-6260-CC
USER’S MANUAL
Acromag, Inc. Tel: 248-295-0310
- 20 -
http://www.acromag.com
- 20 -
www.acromag.com
P16 XMC Connector
Board Crystal
Board Crystal:
50MHz (U22)
Frequency Stability
: ± 0.00500% or 50ppm
DDR3 Memory
64 Meg x 16-bit
Micron Device MT41J64M16JT-125:G uses a double data
rate architecture.
Five MT41J64M16JT-125:G memory devices (U8, U9, U10, U11 and U14) are
used to form a 72-bit data bus to the T4 ASIC.
The DDR3 is used to store the T4 microprocessor firmware and also for data
buffers and connection information when offload is enabled.
256Kb EEPROM
256Kb (32,768 x 8)
Atmel SPI Serial EEPROM contains hardware
configuration and PCIe configuration information. It also contains the T4
ASIC firmware configuration data.
32Mb Flash
32Mb (4Mb x 8)
Micron M25P32 Serial Flash contains the T4’s internal
microprocessor firmware code.
Temperature Sensor
A Texas Instruments
TMP421
is supplied as a way to monitor the
temperature of the ASIC and is connected to the thermal pins of the
Chelsio T4 ASIC.
PCIe Bus Interface
XMC Compatibility:
Conforms to PCI Express Base Specification v2.0, and
XMC Specification, P1386.1
ANSI/VITA 42.0:
Complies with XMC module mechanicals and connectors
ANSI/VITA 42.3:
XMC module with PCI Express Interface
114 pin Samtec ASP-103614-05 connector complies with ANSI/VITA 42.6-
2009 XMC 10 Gigabit Ethernet 4-Lane Protocol Layer standards.
P16 is the secondary XMC connector
Dual XAUI links are provided, each link comprised of 4 lanes running at
3.125Gb/s each for a combined data throughput of 10Gb/s per link.
