Acromag IP511 Series Скачать руководство пользователя страница 3

SERIES IP511 INDUSTRIAL I/O PACK                ISOLATED QUAD EIA/TIA-422B COMMUNICATION MODULE
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Programmable Baud Rate -

 The internal baud rate generator

allows the 8MHz clock to be divided by any divisor between 1 and
2

(16-1)

, providing support for any bit rate up to 512Kbps.

 

Port Power Jumpers Provided for Non-Isolated Mode

 - For

isolated operation, the port connections must include external
is5V power.  However, the IP +5V power supply may be
optionally jumpered to the port(s) for convenient non-isolated
operation.

 

Software Flow Control

 - The IP511-64 includes support for

software flow control for more efficient data transfer.

 

Interrupt Support -

 Individually controlled transmit, receive, line

status, data set, and flow control (IP511-64) interrupts may be
generated.  Unique interrupt vectors may be assigned to each
port.  Interrupt generation uses a priority shifting scheme based on
the last interrupt serviced, preventing the continuous interrupts of
one port from freezing out the interrupts of another port.

 

Socketed Termination Resistors

 - The receiver of each port

includes a network termination resistor installed in a socket on the
board and these may be easily inserted or removed where
required.

 

Internal Diagnostic Capabilities

 - Loopback controls for

communication link fault isolation are included.  Break, parity,
overrun, and framing error simulation are also possible.

 

Industry Standard 16550 Family UART w/16C450 Mode

 - The

UART of this device is a member of the industry standard 16550
family of UART’s and remains software compatible.  Additionally,
this device can operate in a 16C450 UART family software
compatible mode.  The transmit and receive channels are double-
buffered in this mode.  Hold and shift registers eliminate the need
for precise synchronization between the host CPU and the serial
data.

INDUSTRIAL I/O PACK INTERFACE FEATURES

 

High density -

 Single-size, industry standard, IP module footprint.

Four units mounted on a carrier board provide up to 16 serial ports
in a single system slot.  Both VMEbus and ISAbus (PC/AT)
carriers are supported.

 

Local ID

 - Each IP module has its own 8-bit ID PROM which is

accessed via data transfers in the "ID Read" space.

 

8-bit I/O

 - Port register Read/Write is performed through 8-bit data

transfer cycles in the IP module I/O space.

 

High Speed

 - Access times for all data transfer cycles are

described in terms of "wait" states - 2 wait states are required for
reading and writing channel data and interrupt select cycles.  One
wait state is required for reading the ID PROM (see the
Specifications section for detailed information).

SIGNAL INTERFACE PRODUCTS

(See Appendix for more information on compatible products)

This IP module will mate directly to any industry standard IP carrier

board (including Acromag AVME9630/9660 3U/6U non-intelligent
VMEbus carrier boards).  Additionally, ISAbus (PC/AT) carrier boards
are supported (see Acromag Model APC8600).  A wide range of other
Acromag IP modules are also available to serve your signal conditioning
and interface needs.

Note:

 Since all connections to field signals are made through the carrier

board which passes them to the individual IP modules, you should
consult the documentation of your carrier board to ensure compatibility
with the following interface products.

Cables:

Model 5025-551-X (Shielded Cable), or Model 5025-550-X (Non-
Shielded Cable):  A Flat 50-pin cable with female connectors at
both ends for connecting AVME9630/9660, or other compatible
carrier boards, to Model 5025-552 termination panels.  The
unshielded cable is recommended for digital I/O, while the shielded
cable is recommended for optimum performance with precision
analog I/O applications.  The “-X” suffix of the model is used to
specify the required length in feet.

Model 5029-943 IP500 Serial Communication Cable:  A 5 foot long,
flat 50-pin cable with a female connector on one end (for
connection to AVME9630/9660 or other compatible carrier boards)
and four DE-9P connectors (serial ports) on the other end.  Also
used for interface with Acromag Model IP500 (EIA/TIA-232E),
IP501/IP511(EIA/TIA-422B), and IP502/512 (EIA-485) serial
communication modules.

Model 5029-900 APC8600 High-Density Cable:  A 36-inch long
interface cable that mates the high-density (25mil pitch) 50-pin I/O
connectors of the APC8600 PCbus carrier board, to the high-
density connectors on the APC8600 Termination Panel (described
below).

Termination Panels:

Model 5025-552: A DIN-rail mountable panel that provides 50
screw terminals for universal field I/O termination.  Connects to
Acromag AVME9630/9660, or other compatible carrier boards, via
flat 50-pin ribbon cable (Model 5025-550-X or 5025-551-X).

Model 5029-910 APC8600 High-Density-to-Screw-Terminal
Termination Panel:  This panel converts the high-density ribbon-
cable connectors coming from the APC8600 carrier board
(Acromag cable Model 5029-900) to screw terminals, for direct-
wired interfaces.

Transition Module:

Model TRANS-GP:  This module repeats field I/O connections of
IP modules A through D for rear exit from a VMEbus card cage.  It
is available for use in card cages which provide rear exit for I/O
connections via transition modules (transition modules can only be
used in card cages specifically designed for them).  It is a double-
height (6U), single-slot module with front panel hardware adhering
to the VMEbus mechanical dimensions, except for shorter printed
circuit board depth.  It connects to Acromag Termination Panel
5025-552 from the rear of the card cage, and to AVME9630/9660
boards within the card cage, via flat 50-pin ribbon cable (cable
Model 5025-550 or 5025-551).

INDUSTRIAL I/O PACK SOFTWARE LIBRARY

Acromag provides an Industrial I/O Pack Software Library diskette

(Model IPSW-LIB-M03, MSDOS format) to simplify communication with
the board.  Example software functions are provided for both ISAbus
(PC/AT) and VMEbus applications.  All functions are written in the “C”
programming language and can be linked to your application.  For more
details, refer to the “README.TXT” file in the root directory on the
diskette and the “INFO511.TXT” file in the appropriate “IP511”
subdirectory off of “\VMEIP” or “\PCIP”, according to your carrier.

Содержание IP511 Series

Страница 1: ...tion Module USER S MANUAL ACROMAG INCORPORATED 30765 South Wixom Road P O BOX 437 Wixom MI 48393 7037 U S A Tel 248 624 1541 Fax 248 624 9234 Copyright 1996 Acromag Inc Printed in the USA Data and spe...

Страница 2: ...ystem This is especially important where economic property loss or human life is involved It is important that the user employ satisfactory overall system design It is agreed between the Buyer and Acr...

Страница 3: ...er Acromag IP modules are also available to serve your signal conditioning and interface needs Note Since all connections to field signals are made through the carrier board which passes them to the i...

Страница 4: ...ive data paths This SIP can be easily removed or replaced if required see Drawing 4501 581 4501 582 Network Termination Bias Resistor Placement You need to consider your network application carefully...

Страница 5: ...h To the communication network master this line pair is used as the transmit data path To the communication network slave this line pair comprises the receive data path Because a separate pair of line...

Страница 6: ...ides excellent connection integrity and utilizes gold plating in the mating area Threaded metric M2 screws and spacers are supplied with the IP module to provide additional stability for harsh environ...

Страница 7: ...Port A Line Control Register 07 08 Not Driven1 R W MCR Port A Modem Control Register 09 0A Not Driven1 R W LSR Port A Line Status Register 0B 0C Not Driven1 R W MSR Port A Modem Status Register 0D 0E...

Страница 8: ...R W SCR Port C Scratch Pad Interrupt Vector Register 2F Shaded register entries apply to Model IP511 64 only and are accessible after writing BF to the Line Control Register LCR Table 3 1 IP511 I O Sp...

Страница 9: ...g an invalid data character due to a low going noise spike on RxD If the data on RxD is a symmetrical square wave the center of the data cells will occur within 3 125 of the actual center providing an...

Страница 10: ...extended register functionality of IER bits 4 7 IIR bits 4 5 FCR bits 4 5 and MCR bits 5 7 It is also used to program software flow control Note that bits 6 7 are used for hardware flow control but th...

Страница 11: ...7 NO FUNCTION FOR MODEL IP511 0 Disable the CTS interrupt 1 Enable the generation of the CTS interrupt when CTS changes from a low to high state The IP511 does not implement the CTS line and this bit...

Страница 12: ...FO TRIGGER LEVEL 00 01 Bytes 08 Bytes for IP511 64 Models 01 04 Bytes 16 Bytes for IP511 64 Models 10 08 Bytes 56 Bytes for IP511 64 Models 11 14 Bytes 60 Bytes for IP511 64 Models LCR Line Control Re...

Страница 13: ...the selected serial channel In Loopback Mode interrupts are generated by controlling the state of the four lower order MCR bits internally instead of by the external hardware paths However no interru...

Страница 14: ...errupt a priority 1 interrupt in the IIR register when any one of these conditions are detected This interrupt is enabled by setting IER bit 2 to 1 A power up or system reset sets all LSR bits to 0 ex...

Страница 15: ...Low Interrupt Modem Status Changes Read MSR Reset Low OUT1 Reset High OUT2 Reset High After a power up the isolation buffer s output is initialized high As a result the very first bit transmitted or...

Страница 16: ...the FIFO drops below its trigger level When the receiver FIFO and receiver interrupts are enabled the following receiver FIFO character time out status conditions apply 1 A FIFO character time out int...

Страница 17: ...oo quickly to be processed or buffered thus preventing the loss of excess data The flow control characters are stored in the XON 1 2 and XOFF 1 2 registers Two XON XOFF registers are provided because...

Страница 18: ...functionality of the circuitry used on the board is also included Refer to the Block Diagram Drawing 4501 583 Interface Diagram Drawing 4501 581 and Interface Level Diagram Drawing 4501 584 as you re...

Страница 19: ...nsmit the byte Two other parity formats not supported by this module are mark parity and space parity Mark parity specifies that the parity bit will always be a logical 1 space parity requires the par...

Страница 20: ...ed isolated only when isolated external port power is provided to the port Optionally the port may use P1 power by programming the power and common jumpers appropriately In this mode the port is consi...

Страница 21: ...o RFI No data upsets occur for field strengths up to 10V per meter at 27MHz 151MHz 460MHz per SAMA PMC 33 1 test procedures Resistance to EMI Unit has been tested with no data upsets under the influen...

Страница 22: ...performance with precision analog I O applications Application Used to connect a Model 5025 552 termination panel to the AVME9630 9660 non intelligent carrier board A D connectors both have 50 pin con...

Страница 23: ...r Boards Application This panel converts the high density ribbon cable connectors coming from the APC8600 carrier board Acromag cable Model 5029 900 to screw terminals for direct wired interfaces This...

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