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65
Veriton 3500/5500/7500
Integrated Peripherals
.
Parameter
Description
Option
DRAM Timing Selectable
CAS Latency Time
Active to Precharge Delay
DRAM RAS #to CAS# Delay
DRAM RAS# Precharge
SDRAM Timing
The default setting by your DRAM’s SPD.
The default setting by your DRAM’s SPD.
The default setting by your DRAM’s SPD.
The default setting by your DRAM’s SPD.
By SPD
Manual
1.5/2/2.5/3
7/6/5
3/2
3/2
Memory Frequency fo
Memory frequency default setup.
Auto/ DDR200/DDR266
System BIOS Cacheable
E.F segment shadow RAM cacheable.
Enabled/Disabled
Video BIOS Cacheable
C segment shadow RAM cacheable.
Enabled/Disabled
Video RAM Cacheable
A.B segment shadow RAM cacheable.
Disabled/Enabled
Memory Hole at 15M-16
The system will reserve 15-16 MB address for
the add-on card.
Disabled/Enabled
Delayed Transaction
ICH4 enables delayed transactions for internal
register, FWH, and LPC I/F accesses.
Enabled/Disabled
Delay Prior to Thermal
Enables Pentium 4 thermal function - 16 miuntes
after POST.(only for ACPI OS
16/4/8/32 minutes
AGP Aperture Size (MB)
Aperture size: the size of the system memory for
AGP card. Options to decide how many size for
AGP card.
64/4/8/16/32/128/256
On-Chip Video Window size
Aperture size for on-board CPU.
128MB/64MB/Disabled
On-Chip Frame Buffer size
Frame buffer size for on-chip VGA.
8MB/1MB/512MB
Содержание Veriton 5500
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