Acer AL1721h, Руководство по обслуживанию

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45
Gm5120/Gm2120
GND
A3.3V
BANK0
WP
C201
0.1uF/16V
U201
TCM809SENB713
1
2 3
GND
RST VCC
ROM_ADDR14
OR1
EG7
EPR1
FB204
NC
RMADDR9
RMADDR0
RP209 0 1/16W
1
2
3
4 8
7
6
5
ADDRESS
Available for reading from a status register
OG6
BANK0
DHS
OR6
OG5
C228
0.1uF/16V
R215
10K
EMI SOULATION ADD C253
D2.5V
MUTE_OUT
EPG[0..7] P.5
RMADDR8
EPB3
OPR4
R222 10K
8/26 modify
EB3
RMADDR15
RMDATA0
R240 33 1/16W
+PV
C246
5pF
DESCRIPTION
A3.3V
SDA
1
OB6
OG1
EPR3
EPG2
RMADDR11
GND
EG1
RMADDR2
GND
GREEN+ P.2
EPG4
RXC+ P.2
OPR2
1206
RMDATA6
DDC_SDA P.2
SCL
ER0
EB2
EG3
R232 R231 RXXX
NC NC NC SAMSUNG EH
NC 10K NC CHIMEI E4
10K NC NC SAMSUNG EU
10K 10K NC HYDIS 200/300
NC NC 10K CPT 170EA02
NC 10K 10K (RESERVED)
10K NC 10K (RESERVED)
10K 10K 10K AU EN05
GND
RMADDR8
OR2
OPR1
OR2
LED_ORANGE
P.5
GPIO8 P.4
EPR[0..7]
P.5
RMADDR1
OB4
OPB7
ROM_ADDR(4:0)
x
RMADDR11
ROM_ADDR5
OB7
OB6
C204
0.1uF/16V
C212
0.1uF/16V
R223
10K 1/16W
R237
10K
1/
16W
715L1123-A A
gm5120
ACER GM5120/2120
C
3 7 Monday, May 12, 2003
Title
Size Document Number Rev
Date: Sheet of
DDC_SDA_A P.2
RMADDR12
C240
0.1uF/16V
+PV
GPIO6
OR7
EB4
RMADDR5
C233
0.1uF/16V
C242
0.1uF/16V
FB204
OR3
RMADDR1
RMDATA7
x
VGA_PLUG P.2
OB4
DVS
EPB1
HOST_PORT_EN
SPEC(150mA)
OG1
DVS
C202
0.1uF/16V
DHS
OG0
GND
ER6
HOST_PROTOCOL
GPIO6 P.4
PDEN
OR6
ER6
RMDATA1
RMADDR4
R250
NC
1206
GND
VOL_OUT
EPB[0..7] P.5
ER4
OPG5
RMDATA7
2003/02/21
EB1
RMADDR1
C217
0.1uF/16V
0
1
RMADDR5
RMADDR2
RMADDR0
EPR2
EPR7
OG3
R248
10K 1/16W
OG0
RMDATA3
+PV
RX2- P.2
EB5
BANK1
OPR7
C231
0.1uF/16V
RP203 0 1/16W
1
2
3
4 8
7
6
5
R208
10K 1/16W
GPIO7 P.4
OPG6
RMDATA5
C214
0.1uF/16V
C215
0.1uF/16V
USER_BITS(7:5)
EG1 EPG1
/CE
R245
0
C227
0.1uF/16V
C234
0.1uF/16V
PBIAS P.5
STBY_OUT
Int_Test
U203
GM5120
PQFP-208
171
170
167
166
163
162
179
180
185
186
191
192
151
152
40
41
42
43
44
45
46
47
49
50
51
52
118
115
117
116
195
194
174
120
121
122
123
124
125
126
127
128
206
207
208
1
205
204
5
4
6
7
48
39
201
25
24
23
22
19
18
17
16
15
8
35
34
33
32
31
30
29
28
9
10
14
12
13
11
36
155 153
165
169
161
158
157
178
2 20 53 67 81 97 111 129 26 88 134 203 176
113
114
175
182
184
188
190
197
198
199
150
149
148 146 144 141 139
145
140
137
136
3 21 38 54 68 82 98 112 130 89 133 202 135 156 154 177 183 189 147 143 138
200
159
61
62
65
66
69
70
71
72
94
93
75
76
77
78
79
80
74
73
85
86
87
90
91
92
84
83
95
96
99
100
101
102
64
63
105
106
107
108
109
110
104
103
119
27
131
142
132
60
59
58
57
56
55
37 160 164 168 172 173 181 187 193 196
RED+
RED-
GREEN+
GREEN-
BLUE+
BLUE-
RX2+
RX2-
RX1+
RX1-
RX0+
RX0-
XTAL
TCLK
GPIO0/PWM0
GPIO1/PWM1
GPIO2/PWM2
GPIO3/TIMER1
GPIO4/UART_D1
GPIO5/UART_D0
GPIO6/EXTCLK
GPIO7
GPIO10/TCON_ROE3
GPIO11
GPIO12
GPIO13
DCLK/TCON_OCLK
DEN/TCON_ECLK
DVS/TCON_FSYNC
DHS/TCON_LP
RXC-
RXC+
REXT
TCON_OPOL
TCON_OINV
TCON_ESP
TCON_EPOL
TCON_EINV
TCON_RSP2
TCON_RSP3
TCON_RCLK
TCON_ROE
GPIO20/HDATA3
GPIO19/HDATA2
GPIO18/HDATA1
GPIO17/HDATA0
GPIO16/HFS
GPIO22/HCLK
RESETn
GPIO21/IRQn
DDC_SCL
DDC_SDA
GPIO9/TCON_ROE2
GPIO8/IRQINn
CLKOUT
ROM_ADDR0
ROM_ADDR1
ROM_ADDR2
ROM_ADDR3
ROM_ADDR4
ROM_ADDR5
ROM_ADDR6
ROM_ADDR7
ROM_ADDR8
ROM_ADDR15
ROM_DATA0
ROM_DATA1
ROM_DATA2
ROM_DATA3
ROM_DATA4
ROM_DATA5
ROM_DATA6
ROM_DATA7
ROM_ADDR14
ROM_ADDR13
ROM_ADDR9
ROM_ADDR11
ROM_ADDR10
ROM_ADDR12
ROM_OEn
VD
D
1_AD
C
_2.
5
VD
D
2_AD
C
_2.
5
AGND_GREEN
AGND_RED
AGND_BLUE
AGND_ADC
SGND_ADC
AGND_RX2
RVDD RVDD RVDD RVDD RVDD RVDD RVDD RVDD
C
V
D
D
_2.
5
C
V
D
D
_2.
5
C
V
D
D
_2.
5
C
V
D
D
_2.
5
VD
D
_R
X
2_2.
5
PPWR
PBIAS
AGND_IMB
VD
D
_R
X
1_2.
5
AGND_RX1
VD
D
_R
X
0_2.
5
AGND_RX0
AGND_RXC
AGND_RXPLL
VDD_RXPLL_2.5
AVDD_
RPL
L
AVSS_RPLL
VD
D
_D
P
LL_3.
3
AVDD_SDDS
VDD_
SDDS_
3.
3
AVDD_DDDS
VDD_
DDDS_
3.
3
AVSS_SDDS
AVSS_DDDS
HSYNC
VSYNC
RVSS RVSS RVSS RVSS RVSS RVSS RVSS RVSS RVSS CVSS CVSS CVSS CVSS G
N
D
1_AD
C
G
N
D
2_AD
C
GND_
RX2
GND_
RX1
GND_
RX0
VSS_DPLL VSS_SDDS VSS_DDDS
N/C
ADC_TEST
PD6/ER6
PD7/ER7
PD10/EG2
PD11/EG3
PD12/EG4
PD13/EG5
PD14/EG6
PD15/EG7
PD33/OG1
PD32/OG0
PD18/EB2
PD19/EB3
PD20/EB4
PD21/EB5
PD22/EB6
PD23/EB7
PD17/EB1
PD16/EB0
PD26/OR2
PD27/OR3
PD28/OR4
PD29/OR5
PD30/OR6
PD31/OR7
PD25/OR1
PD24/OR0
PD34/OG2
PD35/OG3
PD36/OG4
PD37/OG5
PD38/OG6
PD39/OG7
PD9/EG1
PD8/EG0
PD42/OB2
PD43/OB3
PD44/OB4
PD45/OB5
PD46/OB6
PD47/OB7
PD41/OB1
PD40/OB0
TCON_OSP
CVSS
Reserved
N/C
Reserved
PD5/ER5
PD4/ER4
PD3/ER3
PD2/ER2
PD1/ER1
PD0/ER0
RVDD
AVDD_ADC
AVDD_
BL
UE
AVDD_GREEN
AVDD_
RED
AVDD_
IM
B
AVDD_
RX2
AVDD_
RX1
AVDD_
RX0
AVDD_
RXC
ROM_ADDR9
A2.5V
OPG1
OPB6
C251
1uF/16V
C254
0.1uF/16V
C248
0.1uF/16V
OCM_START
EPG7
R216 4.7K
FB202 60
R239
10K
1/
16W
1
GND
3.3V
OB1
OB5
OB1
OPR6
RMDATA0
C226
0.1uF/16V
FB205
600
EB0
/CE
EB2
RMADDR3
RP201 0 1/16W
1
2
3
4 8
7
6
5
EMI SOULATION ADD C254
RMDATA3
R207
10K
1/
16W
SPEC(500mA)
OB5
EB7
EB5
1 = All 48K of ROM is in external ROM
GND
EG4
R246
10K
1/
16W
C220
0.1uF/16V
SPEC(50mA)
+PV
/ROM_WE
/ROM_WE
DEN
RMADDR15
BANK1
SCLPOL
+PV
ER4
ER1
OB0
R234
10K 1/16W
RX1+ P.2
OB2
RMADDR12
RP208 0 1/16W
1
2
3
4 8
7
6
5
BLUE+ P.2
ER5
EB6
C249
0.1uF/16V
OPB2
R243
NC
12/20
RMADDR6
EPR5
EPG6
OPB5
R206
10K
1/
16W
+3.3V
GPIO3
ER1
OB2
R233
NC
R205 1K 1%
0 = XTAL and TCLK pins are connected
GND
RED+ P.2
UART_DI P.2
EG2
OR1
C241
0.1uF/16V
RP210 0 1/16W
1
2
3
4 8
7
6
5
OCM_ROM_CFG(1)
GND
RMADDR10
OB3
EG6
RMDATA4
EB3
R244
4.7K
ER3
EG2
EPB0
FLASH/ Prom-Jet Socket
D2.5V
OPG[0..7] P.5
OR0
EPB2
LED_GREEN
P.5
RX1- P.2
PVS
OB0
EG6
OPG2
OPB0
OR0
R232
10K
1/
16W
R241 33 1/16W
DVI_PLUG P.2
+PV
RMADDR10
DEN
OG4
C207
0.1uF/16V
RMADDR9
RMADDR14
ER2
SCL
RMDATA1
EB0
RXC- P.2
RMADDR7
OPG7
C252
1uF/16V
R227
0 1/16W
x
PPWR P.5
EPG0
RP211 0 1/16W
1
2
3
4 8
7
6
5
C253
0.1uF/16V
USER_BITS(4:0)
NAME
3
EB7
C203
0.1uF/16V
R242 33 1/16W
RMADDR9
WP
OR4
RP205 0 1/16W
1
2
3
4 8
7
6
5
ROM_ADDR6
RX0- P.2
EG7
RMADDR7
+PV
/RESET
RP204 0 1/16W
1
2
3
4 8
7
6
5
+PV
GND
D3.3V
OR7
RP207
0 1/16W
1
2
3
4 8
7
6
5
R201
NC
ROM_ADDR(12:10)
NEW ADD CIRCUIT FOR 2M ROM04/08
OG2
OPG3
4LED
OSC_SEL
D3.3V
OPG0
C247
5pF
D3.3V
EB6
RMADDR8
OPB1
R214
10K
x
OPR[0..7] P.5
OG7 OPR3
RMADDR12
C209
0.1uF/16V
U202
SOCKET
3
29
28
4
25
23
26
27
5
6
7
8
9
10
11
12
21
20
19
18
17
15
14
13
24
31
32
1
16
2
30
22
A15
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
OE
WE
VCC
NC
GND
A16
NC/A17
CE
R238
10K
1/
16W
OR5
RMADDR14
+
C245
NC
C218
0.1uF/16V
+PV
EPR4
EPB6
U204
M24C16-MN6T
1
2
3
4
5
6
7
8
A0
A1
A2
VSS SI
SCK
WP
VCC
BOOTSTRAP SIGNALS
Available for reading from a status register
RMADDR3
SDA
R249 NC
C260
22pF
C238
0.1uF/16V
A3.3V
GND
RX0+ P.2
LVDS_EN P.5
RMDATA2
EB1
RMADDR0
R231
10K
1/
16W
D201
NC
C232
0.1uF/16V
If using 6-wire host protocol, program this bit to 0
EG0
OR5
OPG4
OR3
OPB4
RMADDR10
OG7
RMADDR4
ROM_ADDR8 GPIO(22:16) is on "Host Port" pins
PWM0 P.4
EPB4
R204 2.7K
SET
OG4
RMADDR6
ER5
EPR0
EPB5
R251
0 1/16W
X201
14.318MHz
1
2
GREEN- P.2
EG5
ER3
RP202
0 1/16W
1
2
3
4 8
7
6
5
D3.3V
OPB[0..7] P.5
R221
10K
Determines polarity of HCLK signal
DDC_SCL P.2
GND
GPIO2 P.4
RP212 0 1/16W
1
2
3
4 8
7
6
5
PCLK
RMADDR14
OG5
C205
0.1uF/16V
ResetIC:250ms
EPG3
32-Pin PLCC Socket
ROM_ADDR13
D-CLK
C208
0.1uF/16V
C210
0.1uF/16V
GND
VS P.2
GND
DDC_SCL_A P.2
RMADDR3
D-CLK
RMADDR2
ROM_ADDR7
SPEC(60mA)
PHS
OG3
OB7
RMDATA6
C213
0.1uF/16V
BLUE- P.2
GPIO7
OG2
2003/02/21
ER0
FB203 60
If using 6-wire host protocol, program this bit to 1 0
EG3
RMADDR4
FB201 60
A2.5V
OG6
OPB3
OPR5
+5V
RMDATA5
12/20
RX2+ P.2
EB4
/ROM_WE
R255 NC
C206
0.1uF/16V
1
FB205
GPIO3 P.4
EPB7
NEW ADD CIRCUIT FOR 2M ROM04/09
RED- P.2
HS P.2
ER2
EG0
RMDATA2
C244
0.1uF/16V
1 = OCM becomes active after OCM_CLK is stable
Reserved
GPIO0/PWM0
ER7
OR4
ER7
GND
EPR6
C219
0.1uF/16V
GND
OB3
A3.3V
+5V
EG5
RMDATA4
C239
0.1uF/16V
GND
UART_DO P.2
RMADDR13
EG4
RMADDR13
R247 0
DIGITAL PORT
RMADDR11
OPR0
2
EPG5
ROM_OEn
C216
0.1uF/16V
RP206
0 1/16W
1
2
3
4 8
7
6
5